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[/] [or1k/] [trunk/] [gdb-5.3/] [sim/] [i960/] [tconfig.in] - Rev 1765

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/* I960 target configuration file.  -*- C -*- */

/* See sim-hload.c.  We properly handle LMA.  */
#define SIM_HANDLES_LMA 1

/* For MSPR support.  FIXME: revisit.  */
#define WITH_DEVICES 1

/* FIXME: Revisit.  */
#ifdef HAVE_DV_SOCKSER
MODULE_INSTALL_FN dv_sockser_install;
#define MODULE_LIST dv_sockser_install,
#endif

#if 0
/* Enable watchpoints.  */
#define WITH_WATCHPOINTS 1
#endif

/* ??? Temporary hack until model support unified.  */
#define SIM_HAVE_MODEL

/* Define this to enable the intrinsic breakpoint mechanism. */
/* FIXME: may be able to remove SIM_HAVE_BREAKPOINT since it essentially
   duplicates ifdef SIM_BREAKPOINT (right?) */
#if 0
#define SIM_HAVE_BREAKPOINTS
#define SIM_BREAKPOINT { 0x10, 0xf1 }
#define SIM_BREAKPOINT_SIZE 2
#endif

/* This is a global setting.  Different cpu families can't mix-n-match -scache
   and -pbb.  However some cpu families may use -simple while others use
   one of -scache/-pbb.  */
#define WITH_SCACHE_PBB 1

#if 0
/* ??? This was obsoleted by the PBB code.  */
/* The semantic code should probably always use a switch().
   However, in case that's not possible in some circumstance, we allow
   the target to choose.  Perhaps this can be autoconf'd on whether the
   switch is too big?  I can't (yet) think of a reason for allowing the
   user to choose, though the developer may certainly wish to.  */
#ifdef WANT_CPU_I960BASE
#define WITH_FAST 1
#define WITH_SEM_SWITCH_FULL 0
#define WITH_SEM_SWITCH_FAST 1
#endif
#endif

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