OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [gdb-5.3/] [sim/] [testsuite/] [sim/] [fr30/] [ldub.cgs] - Rev 1181

Go to most recent revision | Compare with Previous | Blame | View Log

# fr30 testcase for
# mach(): fr30
#  ldub $Rj,$Ri
#  ldub @($R13,$Rj),$Ri
#  ldub @($R14,$disp8),$Ri

        .include "testutils.inc"

        START

        .text
        .global ldub
ldub:
        ; Test ldub $Rj,$Ri
        mvi_h_mem       #0x00adbeef,sp
        set_cc          0x0f            ; condition codes should not change
        ldub            @sp,r7
        test_cc         1 1 1 1
        test_h_gr       0,r7

        mvi_h_mem       #0x01adbeef,sp
        set_cc          0x07            ; condition codes should not change
        ldub            @sp,r7
        test_cc         0 1 1 1
        test_h_gr       1,r7

        mvi_h_mem       #0x7fadbeef,sp
        set_cc          0x0b            ; condition codes should not change
        ldub            @sp,r7
        test_cc         1 0 1 1
        test_h_gr       0x7f,r7

        mvi_h_mem       #0x80adbeef,sp
        set_cc          0x0d            ; condition codes should not change
        ldub            @sp,r7
        test_cc         1 1 0 1
        test_h_gr       0x80,r7

        mvi_h_mem       #0xffadbeef,sp
        set_cc          0x0e            ; condition codes should not change
        ldub            @sp,r7
        test_cc         1 1 1 0
        test_h_gr       0xff,r7

        ; Test ldub @($R13,$Rj),$Ri
        mvr_h_gr        sp,r13
        inci_h_gr       -8,r13
        mvi_h_gr        8,r8

        mvi_h_mem       #0x00adbeef,sp
        set_cc          0x0f            ; condition codes should not change
        ldub            @(r13,r8),r7
        test_cc         1 1 1 1
        test_h_gr       0,r7

        mvi_h_mem       #0x01adbeef,sp
        set_cc          0x07            ; condition codes should not change
        ldub            @(r13,r8),r7
        test_cc         0 1 1 1
        test_h_gr       1,r7

        mvi_h_mem       #0x7fadbeef,sp
        set_cc          0x0b            ; condition codes should not change
        ldub            @(r13,r8),r7
        test_cc         1 0 1 1
        test_h_gr       0x7f,r7

        mvi_h_mem       #0x80adbeef,sp
        set_cc          0x0d            ; condition codes should not change
        ldub            @(r13,r8),r7
        test_cc         1 1 0 1
        test_h_gr       0x80,r7

        mvi_h_mem       #0xffadbeef,sp
        set_cc          0x0e            ; condition codes should not change
        ldub            @(r13,r8),r7
        test_cc         1 1 1 0
        test_h_gr       0xff,r7

        ; Test ldub @($R14,$disp8),$Ri
        mvi_h_mem       #0xdeadbeef,sp
        mvr_h_gr        sp,r14
        mvi_h_gr        -0x7f,r8
        add_h_gr        r8,r14

        set_cc          0x0f            ; condition codes should not change
        ldub            @(r14,0x7f),r7
        test_cc         1 1 1 1
        test_h_gr       0xde,r7

        inci_h_gr       0x3f,r14
        set_cc          0x07            ; condition codes should not change
        ldub            @(r14,0x40),r7
        test_cc         0 1 1 1
        test_h_gr       0xde,r7

        inci_h_gr       0x40,r14
        set_cc          0x0b            ; condition codes should not change
        ldub            @(r14,0x0),r7
        test_cc         1 0 1 1
        test_h_gr       0xde,r7

        inci_h_gr       0x40,r14
        set_cc          0x0d            ; condition codes should not change
        ldub            @(r14,-0x40),r7
        test_cc         1 1 0 1
        test_h_gr       0xde,r7

        inci_h_gr       0x40,r14
        set_cc          0x0e            ; condition codes should not change
        ldub            @(r14,-0x80),r7
        test_cc         1 1 1 0
        test_h_gr       0xde,r7

        pass

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.