URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
[/] [or1k/] [trunk/] [gdb-5.3/] [sim/] [testsuite/] [sim/] [fr30/] [lsl.cgs] - Rev 1773
Go to most recent revision | Compare with Previous | Blame | View Log
# fr30 testcase for lsl $Rj,$Ri, lsl $u4,$Rj
# mach(): fr30
.include "testutils.inc"
START
.text
.global lsl
lsl:
; Test lsl $Rj,$Ri
mvi_h_gr 0xdeadbee0,r7 ; Shift by 0
mvi_h_gr 2,r8
set_cc 0x0d ; Set mask opposite of expected
lsl r7,r8
test_cc 0 0 0 0
test_h_gr 2,r8
mvi_h_gr 0xdeadbee1,r7 ; Shift by 1
mvi_h_gr 2,r8
set_cc 0x0f ; Set mask opposite of expected
lsl r7,r8
test_cc 0 0 1 0
test_h_gr 4,r8
mvi_h_gr 0xdeadbeff,r7 ; Shift by 31
mvi_h_gr 1,r8
set_cc 0x07 ; Set mask opposite of expected
lsl r7,r8
test_cc 1 0 1 0
test_h_gr 0x80000000,r8
mvi_h_gr 0xdeadbeff,r7 ; clear register
mvi_h_gr 2,r8
set_cc 0x0a ; Set mask opposite of expected
lsl r7,r8
test_cc 0 1 1 1
test_h_gr 0x00000000,r8
; Test lsl $u4Ri
mvi_h_gr 2,r8
set_cc 0x0d ; Set mask opposite of expected
lsl 0,r8
test_cc 0 0 0 0
test_h_gr 2,r8
mvi_h_gr 2,r8
set_cc 0x0f ; Set mask opposite of expected
lsl 1,r8
test_cc 0 0 1 0
test_h_gr 4,r8
mvi_h_gr 1,r8
set_cc 0x0e ; Set mask opposite of expected
lsl 15,r8
test_cc 0 0 1 0
test_h_gr 0x00008000,r8
mvi_h_gr 0x00020000,r8
set_cc 0x0a ; Set mask opposite of expected
lsl 15,r8
test_cc 0 1 1 1
test_h_gr 0x00000000,r8
pass
Go to most recent revision | Compare with Previous | Blame | View Log