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/* Table of opcodes for the OpenRISC 16 ISA.
   Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
   Contributed by Johan Rydberg, <johan.rydberg@netinsight.se>
 
This file is part of GDB and GAS.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
/* We treat all letters the same in encode/decode routines so
   we need to assign some characteristics to them like signess etc.*/   
 
#define NUM_UNSIGNED 0
#define NUM_SIGNED 1
 
struct or16_letter {
	char letter;
	int  sign;
	/* int  reloc; relocation per letter ??*/
};
 
static struct or16_letter or16_letters[] =
{ 
{ 'A', NUM_UNSIGNED },
{ 'B', NUM_UNSIGNED },
{ 'D', NUM_UNSIGNED },
{ 'J', NUM_SIGNED },
{ 'L', NUM_UNSIGNED },
{ 'M', NUM_SIGNED },
{ 'N', NUM_SIGNED },
{ 'X', NUM_SIGNED },
{ 'Y', NUM_SIGNED },
{ '\0', 0 }	/* dummy entry */
};
 
struct or16_opcode {
  /* Name of the instruction.  */
  char *name;
 
  /* A string of characters which describe the operands.
     Ranges for I..O can be wrong (I change them the time ;-).
     Valid characters are:
     ,   Itself.  The character appears in the assembly code.
     rA  Register operand.
     rB  Register operand.
     rC  Register operand.
     rD  Register operand.
     I   An immediate operand, range -32768 to 32767.
     J   An immediate operand, range -65536 to 65535.
     K   An immediate operand, range -131072 to 131071.
     L   An immediate operand, range 0 to 31.
     M   An immediate operand, range -128 to 127.
     N   An immediate operand, range -8 to 7.
     O   An immediate operand, unused at the moment. 
     X   12-bit PC relative address 
     Y   26-bit absoule address */
 
  char *args;
 
  /* Opcode and operand encoding. */
  char *encoding;
};
 
#ifndef CONST
#define CONST
#endif /* CONST */
 
static CONST struct or16_opcode or16_opcodes[] =
{
  /* Inherited from old OR32  */
{ "h.sfeq32",  "rA,rB",      "0x4 0x0  AAAA BBBB"},
{ "h.sfne32",  "rA,rB",      "0x4 0x1  AAAA BBBB"},
{ "h.sfgt32s", "rA,rB",      "0x4 0x2  AAAA BBBB"},
{ "h.sfge32s", "rA,rB",      "0x4 0x3  AAAA BBBB"},
{ "h.sflt32s", "rA,rB",      "0x4 0x4  AAAA BBBB"},
{ "h.sfle32s", "rA,rB",      "0x4 0x5  AAAA BBBB"},
{ "h.sfgt32u", "rA,rB",      "0x4 0x6  AAAA BBBB"},
{ "h.sfge32u", "rA,rB",      "0x4 0x7  AAAA BBBB"},
{ "h.sflt32u", "rA,rB",      "0x4 0x8  AAAA BBBB"},
{ "h.sfle32u", "rA,rB",      "0x4 0x9  AAAA BBBB"},
{ "h.ext16s",  "rA",         "0x4 0xB  AAAA 0000"},
{ "h.ext16z",  "rA",         "0x4 0xB  AAAA 0001"},
{ "h.ext8s",   "rA",         "0x4 0xB  AAAA 0010"},
{ "h.ext8z",   "rA",         "0x4 0xB  AAAA 0011"},
{ "h.nop",     "",           "0x4 0xB  0000 0100"},
{ "h.jalr",    "rA",         "0x4 0xB  AAAA 0101"},
{ "h.add32s",  "rA,rB,rD",   "0x7 DDDD AAAA BBBB"},
{ "h.bnf",     "X",          "0xA XXXX XXXX XXXX"},
{ "h.bf",      "X",          "0xB XXXX XXXX XXXX"},
{ "h.movi8se", "rA,M",       "0xC MMMM AAAA MMMM"},
{ "h.mov32",   "rA,rB",      "0xE 0x0  AAAA BBBB"},
/* { 2, "h.sched",   "Z",          "0xF ZZZZ ZZZZ ZZZZ"}, */
 
  /* New insn opcodes, specified by Jimmy Chen-Min Chen, <jimmy87@sunplus.com.tw>  */
{ "h.brk",     "M",          "0xD 0000 MMMM MMMM"},
{ "h.sys",     "M",          "0xD 1000 MMMM MMMM"},
{ "h.rfe",     "",           "0xD 1001 0000 0000"},
{ "h.ma32s",   "rA,rB",      "0xD 0011 AAAA BBBB"},
{ "h.ms32s",   "rA,rB",      "0xD 0010 AAAA BBBB"},
{ "h.mod32s",  "rA,rB",      "0xD 0101 AAAA BBBB"},
{ "h.mod32u",  "rA,rB",      "0xD 0111 AAAA BBBB"},
 
{ "h.mul32s",  "rA,rB",      "0x4 1100 AAAA BBBB"},
{ "h.mul32u",  "rA,rB",      "0x4 1101 AAAA BBBB"},
{ "h.div32s",  "rA,rB",      "0x4 1110 AAAA BBBB"},
{ "h.div32u",  "rA,rB",      "0x4 1111 AAAA BBBB"},
 
{ "h.sub32s",  "rA,rB",      "0xE 0011 AAAA BBBB"},
{ "h.xor32",   "rA,rB",      "0xE 0101 AAAA BBBB"},
{ "h.or32",    "rA,rB",      "0xE 0111 AAAA BBBB"},
{ "h.and32",   "rA,rB",      "0xE 1001 AAAA BBBB"},
 
{ "h.shlai32", "rA,L",       "0xE 101L AAAA LLLL"},
{ "h.shrai32", "rA,L",       "0xE 110L AAAA LLLL"},
{ "h.shrli32", "rA,L",       "0xE 111L AAAA LLLL"},
 
{ "h.shla32",  "rA,rB",      "0xE 1010 AAAA BBBB"},
{ "h.shra32",  "rA,rB",      "0xE 1100 AAAA BBBB"},
{ "h.shrl32",  "rA,rB",      "0xE 1110 AAAA BBBB"},
 
{ "h.ror32",   "rA,rB",      "0xD 1011 AAAA BBBB"},
{ "h.rol32",   "rA,rB",      "0xD 1101 AAAA BBBB"},
 
{ "h.add32u",  "rA,rB",      "0xF 0000 AAAA BBBB"},
{ "h.sub32u",  "rA,rB",      "0xF 0001 AAAA BBBB"},
{ "h.addwc32s","rA,rB",      "0xF 0010 AAAA BBBB"},
{ "h.subwc32s","rA,rB",      "0xF 0011 AAAA BBBB"},
 
{ "h.jmp",     "X",          "0x8 XXXX XXXX XXXX"},
{ "h.jr",      "rA",         "0x4 1011 AAAA 0110"},
 
  /* The next section with insns are a bit speciel. They are normal 16-bit insn but
     are followed by the laster operator in its own 16-bit word. The length of these
     insn are 4 bytes.  */
{ "h.jal",     "Y",          "0x9 YYYY YYYY YYYY YYYYYYYYYYYYYYYY"},
 
{ "h.movi16ze","rA,J",       "0xD 0110 AAAA 0010 JJJJJJJJJJJJJJJJ"},
{ "h.immhi16u","rA,J",       "0xD 0110 AAAA 0011 JJJJJJJJJJJJJJJJ"},
{ "h.addi16s", "rA,rB,J",    "0xE 0001 AAAA BBBB JJJJJJJJJJJJJJJJ"},
{ "h.subi16s", "rA,rB,J",    "0xE 0010 AAAA BBBB JJJJJJJJJJJJJJJJ"},
{ "h.xori16",  "rA,rB,J",    "0xE 0100 AAAA BBBB JJJJJJJJJJJJJJJJ"},
{ "h.ori16",   "rA,rB,J",    "0xE 0110 AAAA BBBB JJJJJJJJJJJJJJJJ"},
{ "h.andi16",  "rA,rB,J",    "0xE 1000 AAAA BBBB JJJJJJJJJJJJJJJJ"},
 
{ "h.load32u", "rA,J(rB)",   "0x5 0000 AAAA BBBB JJJJJJJJJJJJJJJJ"},
{ "h.load16u", "rA,J(rB)",   "0x5 0001 AAAA BBBB JJJJJJJJJJJJJJJJ"},
{ "h.load8u",  "rA,J(rB)",   "0x5 0010 AAAA BBBB JJJJJJJJJJJJJJJJ"},
{ "h.stor32",  "J(rA),rB",   "0x6 0000 AAAA BBBB JJJJJJJJJJJJJJJJ"},
{ "h.stor16",  "J(rA),rB",   "0x6 0001 AAAA BBBB JJJJJJJJJJJJJJJJ"},
{ "h.stor8",   "J(rA),rB",   "0x6 0010 AAAA BBBB JJJJJJJJJJJJJJJJ"},
 
{ "h.load32painu", "rA,N",   "0x5 0011 AAAA NNNN                 "},
{ "h.load16painu", "rA,N",   "0x5 0100 AAAA NNNN                 "},
{ "h.load8painu",  "rA,N",   "0x5 0101 AAAA NNNN                 "},
 
{ "h.stor32pai",   "N,rB",   "0x6 0011 NNNN BBBB                 "},
{ "h.stor16pai",   "N,rB",   "0x6 0100 NNNN BBBB                 "},
{ "h.stor8pai",    "N,rB",   "0x6 0101 NNNN BBBB                 "},
 
{ "h.stor32pain",  "N,rB",   "0x6 0110 NNNN BBBB                 "},
{ "h.stor16pain",  "N,rB",   "0x6 0111 NNNN BBBB                 "},
{ "h.stor8pain",   "N,rB",   "0x6 1000 NNNN BBBB                 "},
 
{ "h.mtsr",    "rA,rB",      "0xF 1110 AAAA BBBB                 "},
{ "h.mfsr",    "rA,rB",      "0xF 1111 AAAA BBBB                 "},
 
{ "", "", "" }    /* Dummy entry, not included in NUM_OPCODES.  This
                        lets code examine entry i+1 without checking
                        if we've run off the end of the table.  */
};
 
CONST unsigned int num_opcodes = (((sizeof or16_opcodes) / (sizeof or16_opcodes[0])) - 1);
 
/* Calculates instruction length in bytes. Either 2 or 4 for OR16
   and always 4 for OR32. */
int insn_len(char *insn)
{
        struct or16_opcode *pinsn;
        char *enc;
        int len = 0;
 
        for(pinsn = or16_opcodes; strlen(pinsn->name); pinsn++) {
                if (strcmp(pinsn->name, insn) == 0) {
                        for (enc = pinsn->encoding; *enc != '\0'; enc++)
                                if ((*enc == '0') && (*(enc+1) == 'x')) {
                                        len += 4;
                                        enc += 2;
                                }
                                else if (!isspace(*enc))
                                        len++;
                        return len / 8;
                }
        }
        printf("insn_len(%s): Unknown instruction.\n", insn);
        exit(1);
}