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[/] [or1k/] [trunk/] [insight/] [sim/] [common/] [sim-reg.c] - Rev 1765

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/* Generic register read/write.
   Copyright (C) 1998 Free Software Foundation, Inc.
   Contributed by Cygnus Solutions.
 
This file is part of GDB, the GNU debugger.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
#include "sim-main.h"
#include "sim-assert.h"
 
/* Generic implementation of sim_fetch_register for simulators using
   CPU_REG_FETCH.
   The contents of BUF are in target byte order.  */
/* ??? Obviously the interface needs to be extended to handle multiple
   cpus.  */
 
int
sim_fetch_register (SIM_DESC sd, int rn, unsigned char *buf, int length)
{
  SIM_CPU *cpu = STATE_CPU (sd, 0);
 
  SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
  return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length);
}
 
/* Generic implementation of sim_fetch_register for simulators using
   CPU_REG_FETCH.
   The contents of BUF are in target byte order.  */
/* ??? Obviously the interface needs to be extended to handle multiple
   cpus.  */
 
int
sim_store_register (SIM_DESC sd, int rn, unsigned char *buf, int length)
{
  SIM_CPU *cpu = STATE_CPU (sd, 0);
 
  SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
  return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length);
}
 

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