OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [insight/] [sim/] [testsuite/] [sim/] [m32r/] [sth-d.cgs] - Rev 578

Go to most recent revision | Compare with Previous | Blame | View Log

# m32r testcase for sth $src1,@($slo16,$src2)
# mach(): m32r m32rx

        .include "testutils.inc"

        start

        .global sth_d
sth_d:
        mvaddr_h_gr r4, data_loc
        mvi_h_gr    r5, 0x123456

        sth r5, @(#8,r4)

        mvaddr_h_gr r4, data_loc2
        ld r4, @r4
        test_h_gr r4, 0x34560000 ; big endian processor

        pass

data_loc:
        .word 0
        .word 0
data_loc2:
        .word 0

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.