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// $Header: /home/marcus/revision_ctrl_test/oc_cvs/cvs/or1k/mp3/lib/xilinx/unisims/RDBK.v,v 1.1.1.1 2001-11-04 19:00:00 lampret Exp $ /* FUNCTION : RDBK dummy simulation module */ `timescale 100 ps / 10 ps `celldefine module RDBK(DATA, RIP, TRIG); parameter cds_action = "ignore"; output DATA, RIP; input TRIG; endmodule `endcelldefine