OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [README] - Rev 1745

Go to most recent revision | Compare with Previous | Blame | View Log

              Or1ksim: The OpenRISC 1000 Architectural Simulator
              ==================================================


What is this stuff?
===================

This is OpenRISC 1000 architectural simulator. See the file COPYING
for copying permission. To contact the authors, see AUTHORS file.

This simulator loads an assembly file for one of the both architectures
and it simulates the operation of instructions. 


Pre-requisites
==============

The GNU toolchain for OpenRISC 1000 is required. Instructions how to build
these GNU tools can be found on www.opencores.org


Installation
============

See the file INSTALL


GNU Tools
=========

Instructions how to build GNU tools can be found on www.opencores.org, or in
the Embecosm Application Note EAN2: "The OpenCores OpenRISC 1000 Simulator and
Tool Chain: Installation Guide" <www.embecosm.com/download/ean2.html>.


Simulator test
==============

Follow the instructions in testbench/README to test the simulator.


Help
====

Run sim with --help option for list of command line options and help in
interactive mode, to list the commands.


OpenRISC and OpenCores
======================

This project is licensed under the GNU Public License version 3. See the file
COPYING for details.

About the same idea as with GNU project except we want free and open source
IP (intellectual property) cores. We design open source, synthesizable
cores. OpenRISC is one such core. It is a 32-bit RISC microprocessor that
will run GNU/Linux.

For more information visit us at http://www.opencores.org.


Upated by Jeremy Bennett (jeremy.bennett@embecosm.com)
6 September 2008

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.