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[/] [or1k/] [trunk/] [or1ksim/] [testbench/] [cfg.S] - Rev 344
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/* Configuration tester */
#include "spr_defs.h"
.section .except
.org 0x100
_reset:
l.addi r1,r0,0x7f00
l.jal _main
l.nop
.section .text
_main:
l.addi r2,r0,0
l.mfspr r3,r0,SPR_VR /* Version */
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.mfspr r3,r0,SPR_UPR /* Unit Present */
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.mfspr r4,r0,SPR_PMR /* Power Management */
l.addi r3,r0,0
l.mtspr r0,r3,SPR_PMR
l.mfspr r3,r0,SPR_PMR
l.andi r3,r3,0xff
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.addi r3,r0,5
l.mtspr r0,r3,SPR_PMR
l.mfspr r3,r0,SPR_PMR
l.andi r3,r3,0xff
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.mtspr r0,r4,SPR_PMR
l.mfspr r3,r0,SPR_CPUCFGR
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.mfspr r3,r0,SPR_DMMUCFGR
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.mfspr r3,r0,SPR_IMMUCFGR
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.mfspr r3,r0,SPR_DCCFGR
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.mfspr r3,r0,SPR_ICCFGR
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.mfspr r3,r0,SPR_DCFGR
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
l.mfspr r3,r0,SPR_PCCFGR
l.mtspr r0,r3,0x1234
l.add r2,r2,r3
/* Configurations may differ, so we will insert another report*/
l.movhi r3,hi(0xdeacf5cc)
l.ori r3,r3,lo(0xdeacf5cc)
l.add r2,r2,r3
l.mtspr r0,r2,0x1234
l.movhi r3,hi(0xdeaddead)
l.ori r3,r3,lo(0xdeaddead)
l.mtspr r0,r3,0x1234
l.addi r3,r0,0
l.sys 203
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