OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [orpmon/] [ram.ld] - Rev 1777

Go to most recent revision | Compare with Previous | Blame | View Log

MEMORY
        {
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000 
        ram     : ORIGIN = 0x00002000, LENGTH = 0x00400000 - 0x00002000
        flash   : ORIGIN = 0xf0000000, LENGTH = 0x04000000
        }

SECTIONS
{
        .vectors :
        {
        *(.crc)
        *(.vectors)
        } > vectors

        .text :
        {
        _text_begin = .;
        *(.text)
        _text_end = .;
        } > ram

        .mytext :
        {
        *(.mytext)
        _fprog_addr = .;
        . += 0x500;
        } > ram

        .data :
        AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))
        {
        *(.data)
        } > ram

        .rodata :
        {
        *(.rodata)
        *(.rodata.*)
        } > ram

        .bss :
        {
        *(.bss)
        } > ram

        .stack :
        {
        *(.stack)
        _src_addr = .;
        } > ram

        . = 0xf0000100;

        .monitor ALIGN(0x40000) :
        {
        *(.monitor)
        } > flash

        . += 0x100000;

        .config ALIGN(0x40000) :
        {
        _cfg_start = .;
        *(.config)
        _cfg_end = .;
        } > flash
}

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.