URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
[/] [or1k/] [trunk/] [rc203soc/] [syn/] [RAMB4_S16.v] - Rev 1775
Go to most recent revision | Compare with Previous | Blame | View Log
// // Black boxes for 4kB caches // // This are black boxes to synthesize caches memories using // distributed memories. // To reduce area and improve timing it is strongly recommend to // use block RAM generated using Coregen // module RAMB4_S16( CLK, RST, ADDR, DI, EN, WE, DO); //synthesis syn_black_box input CLK; input RST; input [7:0] ADDR; input [15:0] DI; input EN; input WE; output [15:0] DO; endmodule
Go to most recent revision | Compare with Previous | Blame | View Log