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//
// Black boxes for 4kB caches
//
// This are black boxes to synthesize caches memories using
// distributed memories. 
// To reduce area and improve timing it is strongly recommend to 
// use block RAM generated using Coregen
//
 
module RAMB4_S4(
	 CLK,
	 RST,
	 ADDR,
	 DI,
	 EN,
	 WE,
	 DO);  //synthesis syn_black_box
 
input CLK;
input RST;
input [9:0] ADDR;
input [3:0] DI;
input EN;
input WE;
output [3:0] DO;
 
endmodule