Subversion Repositories or1k-cf

(*
     Memory access unit

     Copyright 2004 Ken Rose
     All rights reserved
*)

-T

is

component T
  +MemData +WE +MemAddr
  -Addr -Data -WriteEnable
with
  Byte Half ByteEnable HalfEnable
is
  (* Put the byte to be written in the right place in the word *)
  Byte <- {mux MemAddr'[1:0] [
                           (MemData'[7:0] '++' {zero 24 $})
                           ({zero  8 $} '++' MemData'[7:0] '++' {zero 16 $})
                           ({zero 16 $} '++' MemData'[7:0] '++' {zero 8 $})
                           ({zero 24 $} '++' MemData'[7:0])
                          ] $}
  ByteEnable <- {mux MemAddr'[1:0] [
                                 '1000'
                                 '0100'
                                 '0010'
                                 '0001'
                                ] $}

  (* Put the halfword to be written in the right place in the word *)
  Half <- {mux MemAddr'[1] [
                           (MemData'[15:0] '++' {zero 16 $})
                           ({zero 16 $} '++' MemData'[15:0])
                          ] $}
  HalfEnable <- {mux MemAddr'[1] [
                                 '1100'
                                 '0011'
                                ] $}

  Addr <- MemAddr
  Data <- {mux WE [
                    MemData    (* No write - doesn't matter *)
                    MemData    (* Word write *)
                    Byte       (* Byte write *)
                    Half       (* Halfword write *)
                   ] $}

  WriteEnable <- {mux WE [
                           '0000'     (* No write *)
                           '1111'     (* Full word write *)
                           ByteEnable (* Byte write *)
                           HalfEnable (* Half write *)
                          ] $}
end