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>TX39 Hardware Setup</TITLE
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><A
NAME="SETUP-TX39-JMR3904">TX39 Hardware Setup</H1
><P
>The eCos Developer&#8217;s Kit package comes with a pair
of ROMs that provide GDB support for
the Toshiba JMR-TX3904 RISC processor reference board by way of CygMon. </P
><P
>Images of these ROMs are also provided at <TT
CLASS="FILENAME"
>BASE_DIR/loaders/tx39-jmr3904/cygmon50.bin</TT
> and <TT
CLASS="FILENAME"
>BASE_DIR/loaders/tx39-jmr3904/cygmon66.bin</TT
> for
50 MHz and 66 MHz boards respectively. The ROMs are installed to
sockets IC6 and IC7 on the memory daughterboard according to their
labels. Attention should be paid to the correct orientation of these
ROMs during installation.</P
><P
>The GDB stub allows communication with GDB using the serial
port (channel C) at connector PJ1. The communication parameters
are fixed at 38400 baud, 8 data bits, no parity bit, and 1 stop
bit (8-N-1). No handshaking is employed. Connection to the host
computer should be made using an RS232C null modem cable.</P
><P
>CygMon and eCos currently provide support for a 16Mbyte 60ns
72pin DRAM SIMM fitted to the PJ21 connector. Different size DRAMs
may require changes in the value stored in the DCCR0 register. This
value may be found near line 211 in <TT
CLASS="FILENAME"
>hal/mips/arch/<TT
CLASS="REPLACEABLE"
><I
>&#60;version&#62;</I
></TT
>/src/vectors.S</TT
>
in eCos, and near line 99 in
	  <TT
CLASS="FILENAME"
>libstub/mips/tx39jmr/tx39jmr-power.S</TT
> in
CygMon. eCos does not currently use the DRAM for any purpose itself,
so it is entirely available for application use.</P
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