URL
https://opencores.org/ocsvn/or1k_old/or1k_old/trunk
Subversion Repositories or1k_old
[/] [or1k_old/] [trunk/] [mp3/] [lib/] [xilinx/] [unisims/] [OR5B1.v] - Rev 1782
Compare with Previous | Blame | View Log
// $Header: /home/marcus/revision_ctrl_test/oc_cvs/cvs/or1k/mp3/lib/xilinx/unisims/OR5B1.v,v 1.1.1.1 2001-11-04 18:59:50 lampret Exp $ /* FUNCTION : 5-INPUT OR GATE */ `timescale 100 ps / 10 ps `celldefine module OR5B1 (O, I0, I1, I2, I3, I4); parameter cds_action = "ignore"; output O; input I0, I1, I2, I3, I4; not N0 (i0_inv, I0); or O1 (O, i0_inv, I1, I2, I3, I4); specify (I0 *> O) = (1, 1); (I1 *> O) = (1, 1); (I2 *> O) = (1, 1); (I3 *> O) = (1, 1); (I4 *> O) = (1, 1); endspecify endmodule `endcelldefine