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[/] [or1k_old/] [trunk/] [mp3/] [syn/] [design_compiler/] [bin/] [save_design.inc] - Rev 1782
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/* Save current design using synopsys format */write -hierarchy -format db -output GATE_PATH + STAGE + _ + TOPLEVEL + .db/* Save current design using verilog format */write -hierarchy -format verilog -output GATE_PATH + STAGE + _ + TOPLEVEL + .v