OpenCores
URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [Documentation/] [blackfin/] [cachefeatures.txt] - Rev 3

Compare with Previous | Blame | View Log

/*
 * File:         Documentation/blackfin/cachefeatures.txt
 * Based on:
 * Author:
 *
 * Created:
 * Description:  This file contains the simple DMA Implementation for Blackfin
 *
 * Rev:          $Id: cachefeatures.txt 2384 2006-11-01 04:12:43Z magicyang $
 *
 * Modified:
 *               Copyright 2004-2006 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 */

        - Instruction and Data cache initialization.
                icache_init();
                dcache_init();

        -  Instruction and Data cache Invalidation Routines, when flushing the
           same is not required.
                _icache_invalidate();
                _dcache_invalidate();

        Also, for invalidating the entire instruction and data cache, the below
        routines are provided (another method for invalidation, refer page no 267 and 287 of
        ADSP-BF533 Hardware Reference manual)

                invalidate_entire_dcache();
                invalidate_entire_icache();

        -External Flushing of Instruction and data cache routines.

                flush_instruction_cache();
                flush_data_cache();

        - Internal Flushing of Instruction and Data Cache.

                icplb_flush();
                dcplb_flush();

        - Locking the cache.

                cache_grab_lock();
                cache_lock();

        Please refer linux-2.6.x/Documentation/blackfin/cache-lock.txt for how to
        lock the cache.

        Locking the cache is optional feature.

        - Miscellaneous cache functions.

                flush_cache_all();
                flush_cache_mm();
                invalidate_dcache_range();
                flush_dcache_range();
                flush_dcache_page();
                flush_cache_range();
                flush_cache_page();
                invalidate_dcache_range();
                flush_page_to_ram();

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.