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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [alpha/] [kernel/] [ns87312.c] - Rev 3
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/* * linux/arch/alpha/kernel/ns87312.c */ #include <linux/init.h> #include <asm/io.h> #include "proto.h" /* * The SRM console *disables* the IDE interface, this code ensures it's * enabled. * * This code bangs on a control register of the 87312 Super I/O chip * that implements parallel port/serial ports/IDE/FDI. Depending on * the motherboard, the Super I/O chip can be configured through a * pair of registers that are located either at I/O ports 0x26e/0x26f * or 0x398/0x399. Unfortunately, autodetecting which base address is * in use works only once (right after a reset). The Super I/O chip * has the additional quirk that configuration register data must be * written twice (I believe this is a safety feature to prevent * accidental modification---fun, isn't it?). */ void __init ns87312_enable_ide(long ide_base) { int data; unsigned long flags; local_irq_save(flags); outb(0, ide_base); /* set the index register for reg #0 */ data = inb(ide_base+1); /* read the current contents */ outb(0, ide_base); /* set the index register for reg #0 */ outb(data | 0x40, ide_base+1); /* turn on IDE */ outb(data | 0x40, ide_base+1); /* turn on IDE, really! */ local_irq_restore(flags); }