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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [frv/] [kernel/] [break.S] - Rev 3
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/* break.S: Break interrupt handling (kept separate from entry.S)** Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.* Written by David Howells (dhowells@redhat.com)** This program is free software; you can redistribute it and/or* modify it under the terms of the GNU General Public License* as published by the Free Software Foundation; either version* 2 of the License, or (at your option) any later version.*/#include <linux/linkage.h>#include <asm/setup.h>#include <asm/segment.h>#include <asm/ptrace.h>#include <asm/thread_info.h>#include <asm/spr-regs.h>#include <asm/errno.h>## the break handler has its own stack#.section .bss.stack.globl __break_user_context.balign THREAD_SIZE__break_stack:.space THREAD_SIZE - FRV_FRAME0_SIZE__break_frame_0:.space FRV_FRAME0_SIZE## miscellaneous variables#.section .bss#ifdef CONFIG_MMU.globl __break_tlb_miss_real_return_info__break_tlb_miss_real_return_info:.balign 8.space 2*4 /* saved PCSR, PSR for TLB-miss handler fixup */#endif__break_trace_through_exceptions:.space 4#define CS2_ECS1 0xe1200000#define CS2_USERLED 0x4.macro LEDS val,reg# sethi.p %hi(CS2_ECS1+CS2_USERLED),gr30# setlo %lo(CS2_ECS1+CS2_USERLED),gr30# setlos #~\val,\reg# st \reg,@(gr30,gr0)# setlos #0x5555,\reg# sethi.p %hi(0xffc00100),gr30# setlo %lo(0xffc00100),gr30# sth \reg,@(gr30,gr0)# membar.endm################################################################################# entry point for Break Exceptions/Interrupts################################################################################.section .text.break.balign 4.globl __entry_break__entry_break:#ifdef CONFIG_MMUmovgs gr31,scr3#endifLEDS 0x1001,gr31sethi.p %hi(__break_frame_0),gr31setlo %lo(__break_frame_0),gr31stdi gr2,@(gr31,#REG_GR(2))movsg ccr,gr3sti gr3,@(gr31,#REG_CCR)# catch the return from a TLB-miss handler that had single-step disabled# traps will be enabled, so we have to do this now#ifdef CONFIG_MMUmovsg bpcsr,gr3sethi.p %hi(__break_tlb_miss_return_breaks_here),gr2setlo %lo(__break_tlb_miss_return_breaks_here),gr2subcc gr2,gr3,gr0,icc0beq icc0,#2,__break_return_singlestep_tlbmiss#endif# determine whether we have stepped through into an exception# - we need to take special action to suspend h/w single stepping if we've done# that, so that the gdbstub doesn't get bogged down endlessly stepping through# external interrupt handlingmovsg bpsr,gr3andicc gr3,#BPSR_BET,gr0,icc0bne icc0,#2,__break_maybe_userspace /* jump if PSR.ET was 1 */LEDS 0x1003,gr2movsg brr,gr3andicc gr3,#BRR_ST,gr0,icc0andicc.p gr3,#BRR_SB,gr0,icc1bne icc0,#2,__break_step /* jump if single-step caused break */beq icc1,#2,__break_continue /* jump if BREAK didn't cause break */LEDS 0x1007,gr2# handle special breaksmovsg bpcsr,gr3sethi.p %hi(__entry_return_singlestep_breaks_here),gr2setlo %lo(__entry_return_singlestep_breaks_here),gr2subcc gr2,gr3,gr0,icc0beq icc0,#2,__break_return_singlestepbra __break_continue################################################################################# handle BREAK instruction in kernel-mode exception epilogue################################################################################__break_return_singlestep:LEDS 0x100f,gr2# special break insn requests single-stepping to be turned back on# HERE RETT# PSR.ET 0 0# PSR.PS old PSR.S ?# PSR.S 1 1# BPSR.ET 0 1 (can't have caused orig excep otherwise)# BPSR.BS 1 old PSR.Smovsg dcr,gr2sethi.p %hi(DCR_SE),gr3setlo %lo(DCR_SE),gr3or gr2,gr3,gr2movgs gr2,dcrmovsg psr,gr2andi gr2,#PSR_PS,gr2slli gr2,#11,gr2 /* PSR.PS -> BPSR.BS */ori gr2,#BPSR_BET,gr2 /* 1 -> BPSR.BET */movgs gr2,bpsr# return to the invoker of the original kernel exceptionmovsg pcsr,gr2movgs gr2,bpcsrLEDS 0x101f,gr2ldi @(gr31,#REG_CCR),gr3movgs gr3,ccrlddi.p @(gr31,#REG_GR(2)),gr2xor gr31,gr31,gr31movgs gr0,brr#ifdef CONFIG_MMUmovsg scr3,gr31#endifrett #1################################################################################# handle BREAK instruction in TLB-miss handler return path#################################################################################ifdef CONFIG_MMU__break_return_singlestep_tlbmiss:LEDS 0x1100,gr2sethi.p %hi(__break_tlb_miss_real_return_info),gr3setlo %lo(__break_tlb_miss_real_return_info),gr3lddi @(gr3,#0),gr2movgs gr2,pcsrmovgs gr3,psrbra __break_return_singlestep#endif################################################################################# handle single stepping into an exception prologue from kernel mode# - we try and catch it whilst it is still in the main vector table# - if we catch it there, we have to jump to the fixup handler# - there is a fixup table that has a pointer for every 16b slot in the trap# table################################################################################__break_step:LEDS 0x2003,gr2# external interrupts seem to escape from the trap table before single# step catches up with themmovsg bpcsr,gr2sethi.p %hi(__entry_kernel_external_interrupt),gr3setlo %lo(__entry_kernel_external_interrupt),gr3subcc.p gr2,gr3,gr0,icc0sethi %hi(__entry_uspace_external_interrupt),gr3setlo.p %lo(__entry_uspace_external_interrupt),gr3beq icc0,#2,__break_step_kernel_external_interruptsubcc.p gr2,gr3,gr0,icc0sethi %hi(__entry_kernel_external_interrupt_virtually_disabled),gr3setlo.p %lo(__entry_kernel_external_interrupt_virtually_disabled),gr3beq icc0,#2,__break_step_uspace_external_interruptsubcc.p gr2,gr3,gr0,icc0sethi %hi(__entry_kernel_external_interrupt_virtual_reenable),gr3setlo.p %lo(__entry_kernel_external_interrupt_virtual_reenable),gr3beq icc0,#2,__break_step_kernel_external_interrupt_virtually_disabledsubcc gr2,gr3,gr0,icc0beq icc0,#2,__break_step_kernel_external_interrupt_virtual_reenableLEDS 0x2007,gr2# the two main vector tables are adjacent on one 8Kb slabmovsg bpcsr,gr2setlos #0xffffe000,gr3and gr2,gr3,gr2sethi.p %hi(__trap_tables),gr3setlo %lo(__trap_tables),gr3subcc gr2,gr3,gr0,icc0bne icc0,#2,__break_continueLEDS 0x200f,gr2# skip workaround if so requested by GDBsethi.p %hi(__break_trace_through_exceptions),gr3setlo %lo(__break_trace_through_exceptions),gr3ld @(gr3,gr0),gr3subcc gr3,gr0,gr0,icc0bne icc0,#0,__break_continueLEDS 0x201f,gr2# access the fixup table - there's a 1:1 mapping between the slots in the trap tables and# the slots in the trap fixup tables allowing us to simply divide the offset into the# former by 4 to access the lattersethi.p %hi(__trap_tables),gr3setlo %lo(__trap_tables),gr3movsg bpcsr,gr2sub gr2,gr3,gr2srli.p gr2,#2,gr2sethi %hi(__trap_fixup_tables),gr3setlo.p %lo(__trap_fixup_tables),gr3andi gr2,#~3,gr2ld @(gr2,gr3),gr2jmpil @(gr2,#0)# step through an internal exception from kernel mode.globl __break_step_kernel_softprog_interrupt__break_step_kernel_softprog_interrupt:sethi.p %hi(__entry_kernel_softprog_interrupt_reentry),gr3setlo %lo(__entry_kernel_softprog_interrupt_reentry),gr3bra __break_return_as_kernel_prologue# step through an external interrupt from kernel mode.globl __break_step_kernel_external_interrupt__break_step_kernel_external_interrupt:# deal with virtual interrupt disablementbeq icc2,#0,__break_step_kernel_external_interrupt_virtually_disabledsethi.p %hi(__entry_kernel_external_interrupt_reentry),gr3setlo %lo(__entry_kernel_external_interrupt_reentry),gr3__break_return_as_kernel_prologue:LEDS 0x203f,gr2movgs gr3,bpcsr# do the bit we had to skip#ifdef CONFIG_MMUmovsg ear0,gr2 /* EAR0 can get clobbered by gdb-stub (ICI/ICEI) */movgs gr2,scr2#endifor.p sp,gr0,gr2 /* set up the stack pointer */subi sp,#REG__END,spsti.p gr2,@(sp,#REG_SP)setlos #REG__STATUS_STEP,gr2sti gr2,@(sp,#REG__STATUS) /* record single step status */# cancel single-stepping modemovsg dcr,gr2sethi.p %hi(~DCR_SE),gr3setlo %lo(~DCR_SE),gr3and gr2,gr3,gr2movgs gr2,dcrLEDS 0x207f,gr2ldi @(gr31,#REG_CCR),gr3movgs gr3,ccrlddi.p @(gr31,#REG_GR(2)),gr2xor gr31,gr31,gr31movgs gr0,brr#ifdef CONFIG_MMUmovsg scr3,gr31#endifrett #1# we single-stepped into an interrupt handler whilst interrupts were merely virtually disabled# need to really disable interrupts, set flag, fix up and return__break_step_kernel_external_interrupt_virtually_disabled:movsg psr,gr2andi gr2,#~PSR_PIL,gr2ori gr2,#PSR_PIL_14,gr2 /* debugging interrupts only */movgs gr2,psrldi @(gr31,#REG_CCR),gr3movgs gr3,ccrsubcc.p gr0,gr0,gr0,icc2 /* leave Z set, clear C */# exceptions must've been enabled and we must've been in supervisor modesetlos BPSR_BET|BPSR_BS,gr3movgs gr3,bpsr# return to where the interrupt happenedmovsg pcsr,gr2movgs gr2,bpcsrlddi.p @(gr31,#REG_GR(2)),gr2xor gr31,gr31,gr31movgs gr0,brr#ifdef CONFIG_MMUmovsg scr3,gr31#endifrett #1# we stepped through into the virtual interrupt reenablement trap## we also want to single step anyway, but after fixing up so that we get an event on the# instruction after the broken-into exception returns.globl __break_step_kernel_external_interrupt_virtual_reenable__break_step_kernel_external_interrupt_virtual_reenable:movsg psr,gr2andi gr2,#~PSR_PIL,gr2movgs gr2,psrldi @(gr31,#REG_CCR),gr3movgs gr3,ccrsubicc gr0,#1,gr0,icc2 /* clear Z, set C */# save the adjusted ICC2movsg ccr,gr3sti gr3,@(gr31,#REG_CCR)# exceptions must've been enabled and we must've been in supervisor modesetlos BPSR_BET|BPSR_BS,gr3movgs gr3,bpsr# return to where the trap happenedmovsg pcsr,gr2movgs gr2,bpcsr# and then process the single stepbra __break_continue# step through an internal exception from uspace mode.globl __break_step_uspace_softprog_interrupt__break_step_uspace_softprog_interrupt:sethi.p %hi(__entry_uspace_softprog_interrupt_reentry),gr3setlo %lo(__entry_uspace_softprog_interrupt_reentry),gr3bra __break_return_as_uspace_prologue# step through an external interrupt from kernel mode.globl __break_step_uspace_external_interrupt__break_step_uspace_external_interrupt:sethi.p %hi(__entry_uspace_external_interrupt_reentry),gr3setlo %lo(__entry_uspace_external_interrupt_reentry),gr3__break_return_as_uspace_prologue:LEDS 0x20ff,gr2movgs gr3,bpcsr# do the bit we had to skipsethi.p %hi(__kernel_frame0_ptr),gr28setlo %lo(__kernel_frame0_ptr),gr28ldi.p @(gr28,#0),gr28setlos #REG__STATUS_STEP,gr2sti gr2,@(gr28,#REG__STATUS) /* record single step status */# cancel single-stepping modemovsg dcr,gr2sethi.p %hi(~DCR_SE),gr3setlo %lo(~DCR_SE),gr3and gr2,gr3,gr2movgs gr2,dcrLEDS 0x20fe,gr2ldi @(gr31,#REG_CCR),gr3movgs gr3,ccrlddi.p @(gr31,#REG_GR(2)),gr2xor gr31,gr31,gr31movgs gr0,brr#ifdef CONFIG_MMUmovsg scr3,gr31#endifrett #1#ifdef CONFIG_MMU# step through an ITLB-miss handler from user mode.globl __break_user_insn_tlb_miss__break_user_insn_tlb_miss:# we'll want to try the trap stub againsethi.p %hi(__trap_user_insn_tlb_miss),gr2setlo %lo(__trap_user_insn_tlb_miss),gr2movgs gr2,bpcsr__break_tlb_miss_common:LEDS 0x2101,gr2# cancel single-stepping modemovsg dcr,gr2sethi.p %hi(~DCR_SE),gr3setlo %lo(~DCR_SE),gr3and gr2,gr3,gr2movgs gr2,dcr# we'll swap the real return address for one with a BREAK insn so that we can re-enable# single stepping on returnmovsg pcsr,gr2sethi.p %hi(__break_tlb_miss_real_return_info),gr3setlo %lo(__break_tlb_miss_real_return_info),gr3sti gr2,@(gr3,#0)sethi.p %hi(__break_tlb_miss_return_break),gr2setlo %lo(__break_tlb_miss_return_break),gr2movgs gr2,pcsr# we also have to fudge PSR because the return BREAK is in kernel space and we want# to get a BREAK fault not an access violation should the return be to userspacemovsg psr,gr2sti.p gr2,@(gr3,#4)ori gr2,#PSR_PS,gr2movgs gr2,psrLEDS 0x2102,gr2ldi @(gr31,#REG_CCR),gr3movgs gr3,ccrlddi @(gr31,#REG_GR(2)),gr2movsg scr3,gr31movgs gr0,brrrett #1# step through a DTLB-miss handler from user mode.globl __break_user_data_tlb_miss__break_user_data_tlb_miss:# we'll want to try the trap stub againsethi.p %hi(__trap_user_data_tlb_miss),gr2setlo %lo(__trap_user_data_tlb_miss),gr2movgs gr2,bpcsrbra __break_tlb_miss_common# step through an ITLB-miss handler from kernel mode.globl __break_kernel_insn_tlb_miss__break_kernel_insn_tlb_miss:# we'll want to try the trap stub againsethi.p %hi(__trap_kernel_insn_tlb_miss),gr2setlo %lo(__trap_kernel_insn_tlb_miss),gr2movgs gr2,bpcsrbra __break_tlb_miss_common# step through a DTLB-miss handler from kernel mode.globl __break_kernel_data_tlb_miss__break_kernel_data_tlb_miss:# we'll want to try the trap stub againsethi.p %hi(__trap_kernel_data_tlb_miss),gr2setlo %lo(__trap_kernel_data_tlb_miss),gr2movgs gr2,bpcsrbra __break_tlb_miss_common#endif################################################################################# handle debug events originating with userspace################################################################################__break_maybe_userspace:LEDS 0x3003,gr2setlos #BPSR_BS,gr2andcc gr3,gr2,gr0,icc0bne icc0,#0,__break_continue /* skip if PSR.S was 1 */movsg brr,gr2andicc gr2,#BRR_ST|BRR_SB,gr0,icc0beq icc0,#0,__break_continue /* jump if not BREAK or single-step */LEDS 0x3007,gr2# do the first part of the exception prologue heresethi.p %hi(__kernel_frame0_ptr),gr28setlo %lo(__kernel_frame0_ptr),gr28ldi @(gr28,#0),gr28andi gr28,#~7,gr28# set up the kernel stack pointersti sp ,@(gr28,#REG_SP)ori gr28,0,spsti gr0 ,@(gr28,#REG_GR(28))stdi gr20,@(gr28,#REG_GR(20))stdi gr22,@(gr28,#REG_GR(22))movsg tbr,gr20movsg bpcsr,gr21movsg psr,gr22# determine the exception type and cancel single-stepping modeor gr0,gr0,gr23movsg dcr,gr2sethi.p %hi(DCR_SE),gr3setlo %lo(DCR_SE),gr3andcc gr2,gr3,gr0,icc0beq icc0,#0,__break_no_user_sstep /* must have been a BREAK insn */not gr3,gr3and gr2,gr3,gr2movgs gr2,dcrori gr23,#REG__STATUS_STEP,gr23__break_no_user_sstep:LEDS 0x300f,gr2movsg brr,gr2andi gr2,#BRR_ST|BRR_SB,gr2slli gr2,#1,gr2or gr23,gr2,gr23sti.p gr23,@(gr28,#REG__STATUS) /* record single step status */# adjust the value acquired from TBR - this indicates the exceptionsetlos #~TBR_TT,gr2and.p gr20,gr2,gr20setlos #TBR_TT_BREAK,gr2or.p gr20,gr2,gr20# fudge PSR.PS and BPSR.BS to return to kernel mode through the trap# table as trap 126andi gr22,#~PSR_PS,gr22 /* PSR.PS should be 0 */movgs gr22,psrsetlos #BPSR_BS,gr2 /* BPSR.BS should be 1 and BPSR.BET 0 */movgs gr2,bpsr# return through remainder of the exception prologue# - need to load gr23 with return handler addresssethi.p %hi(__entry_return_from_user_exception),gr23setlo %lo(__entry_return_from_user_exception),gr23sethi.p %hi(__entry_common),gr3setlo %lo(__entry_common),gr3movgs gr3,bpcsrLEDS 0x301f,gr2ldi @(gr31,#REG_CCR),gr3movgs gr3,ccrlddi.p @(gr31,#REG_GR(2)),gr2xor gr31,gr31,gr31movgs gr0,brr#ifdef CONFIG_MMUmovsg scr3,gr31#endifrett #1################################################################################# resume normal debug-mode entry################################################################################__break_continue:LEDS 0x4003,gr2# set up the kernel stack pointersti sp,@(gr31,#REG_SP)sethi.p %hi(__break_frame_0),spsetlo %lo(__break_frame_0),sp# finish building the exception framestdi gr4 ,@(gr31,#REG_GR(4))stdi gr6 ,@(gr31,#REG_GR(6))stdi gr8 ,@(gr31,#REG_GR(8))stdi gr10,@(gr31,#REG_GR(10))stdi gr12,@(gr31,#REG_GR(12))stdi gr14,@(gr31,#REG_GR(14))stdi gr16,@(gr31,#REG_GR(16))stdi gr18,@(gr31,#REG_GR(18))stdi gr20,@(gr31,#REG_GR(20))stdi gr22,@(gr31,#REG_GR(22))stdi gr24,@(gr31,#REG_GR(24))stdi gr26,@(gr31,#REG_GR(26))sti gr0 ,@(gr31,#REG_GR(28)) /* NULL frame pointer */sti gr29,@(gr31,#REG_GR(29))sti gr30,@(gr31,#REG_GR(30))sti gr8 ,@(gr31,#REG_ORIG_GR8)#ifdef CONFIG_MMUmovsg scr3,gr19sti gr19,@(gr31,#REG_GR(31))#endifmovsg bpsr ,gr19movsg tbr ,gr20movsg bpcsr,gr21movsg psr ,gr22movsg isr ,gr23movsg cccr ,gr25movsg lr ,gr26movsg lcr ,gr27andi.p gr22,#~(PSR_S|PSR_ET),gr5 /* rebuild PSR */andi gr19,#PSR_ET,gr4or.p gr4,gr5,gr5srli gr19,#10,gr4andi gr4,#PSR_S,gr4or.p gr4,gr5,gr5setlos #-1,gr6sti gr20,@(gr31,#REG_TBR)sti gr21,@(gr31,#REG_PC)sti gr5 ,@(gr31,#REG_PSR)sti gr23,@(gr31,#REG_ISR)sti gr25,@(gr31,#REG_CCCR)stdi gr26,@(gr31,#REG_LR)sti gr6 ,@(gr31,#REG_SYSCALLNO)# store CPU-specific regsmovsg iacc0h,gr4movsg iacc0l,gr5stdi gr4,@(gr31,#REG_IACC0)movsg gner0,gr4movsg gner1,gr5stdi gr4,@(gr31,#REG_GNER0)# build the debug register framemovsg brr,gr4movgs gr0,brrmovsg nmar,gr5movsg dcr,gr6sethi.p %hi(__debug_status),gr7setlo %lo(__debug_status),gr7stdi gr4 ,@(gr7,#DEBUG_BRR)sti gr19,@(gr7,#DEBUG_BPSR)sti.p gr6 ,@(gr7,#DEBUG_DCR)# trap exceptions during break handling and disable h/w breakpoints/watchpointssethi %hi(DCR_EBE),gr5setlo.p %lo(DCR_EBE),gr5sethi %hi(__entry_breaktrap_table),gr4setlo %lo(__entry_breaktrap_table),gr4movgs gr5,dcrmovgs gr4,tbr# set up kernel global registerssethi.p %hi(__kernel_current_task),gr5setlo %lo(__kernel_current_task),gr5ld @(gr5,gr0),gr29ldi.p @(gr29,#4),gr15 ; __current_thread_info = current->thread_infosethi %hi(_gp),gr16setlo.p %lo(_gp),gr16# make sure we (the kernel) get div-zero and misalignment exceptionssetlos #ISR_EDE|ISR_DTT_DIVBYZERO|ISR_EMAM_EXCEPTION,gr5movgs gr5,isr# enter the GDB stubLEDS 0x4007,gr2or.p gr0,gr0,fpcall debug_stubLEDS 0x403f,gr2# return from breaklddi @(gr31,#REG_IACC0),gr4movgs gr4,iacc0hmovgs gr5,iacc0llddi @(gr31,#REG_GNER0),gr4movgs gr4,gner0movgs gr5,gner1lddi @(gr31,#REG_LR) ,gr26lddi @(gr31,#REG_CCR) ,gr24lddi @(gr31,#REG_PSR) ,gr22ldi @(gr31,#REG_PC) ,gr21ldi @(gr31,#REG_TBR) ,gr20sethi.p %hi(__debug_status),gr6setlo %lo(__debug_status),gr6ldi.p @(gr6,#DEBUG_DCR) ,gr6andi gr22,#PSR_S,gr19 /* rebuild BPSR */andi.p gr22,#PSR_ET,gr5slli gr19,#10,gr19or gr5,gr19,gr19movgs gr6 ,dcrmovgs gr19,bpsrmovgs gr20,tbrmovgs gr21,bpcsrmovgs gr23,isrmovgs gr24,ccrmovgs gr25,cccrmovgs gr26,lrmovgs gr27,lcrLEDS 0x407f,gr2#ifdef CONFIG_MMUldi @(gr31,#REG_GR(31)),gr2movgs gr2,scr3#endifldi @(gr31,#REG_GR(30)),gr30ldi @(gr31,#REG_GR(29)),gr29lddi @(gr31,#REG_GR(26)),gr26lddi @(gr31,#REG_GR(24)),gr24lddi @(gr31,#REG_GR(22)),gr22lddi @(gr31,#REG_GR(20)),gr20lddi @(gr31,#REG_GR(18)),gr18lddi @(gr31,#REG_GR(16)),gr16lddi @(gr31,#REG_GR(14)),gr14lddi @(gr31,#REG_GR(12)),gr12lddi @(gr31,#REG_GR(10)),gr10lddi @(gr31,#REG_GR(8)) ,gr8lddi @(gr31,#REG_GR(6)) ,gr6lddi @(gr31,#REG_GR(4)) ,gr4lddi @(gr31,#REG_GR(2)) ,gr2ldi.p @(gr31,#REG_SP) ,spxor gr31,gr31,gr31movgs gr0,brr#ifdef CONFIG_MMUmovsg scr3,gr31#endifrett #1##################################################################################################### GDB stub "system calls"#####################################################################################################ifdef CONFIG_GDBSTUB# void gdbstub_console_write(struct console *con, const char *p, unsigned n).globl gdbstub_console_writegdbstub_console_write:breakbralr#endif# GDB stub BUG() trap# GR8 is the proposed signal number.globl __debug_bug_trap__debug_bug_trap:breakbralr# transfer kernel exeception to GDB for handling.globl __break_hijack_kernel_event__break_hijack_kernel_event:break.globl __break_hijack_kernel_event_breaks_here__break_hijack_kernel_event_breaks_here:nop#ifdef CONFIG_MMU# handle a return from TLB-miss that requires single-step reactivation.globl __break_tlb_miss_return_break__break_tlb_miss_return_break:break__break_tlb_miss_return_breaks_here:nop#endif# guard the first .text label in the next file from confusionnop