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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [or32/] [config.in] - Rev 7
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#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/config-language.txt.
#
mainmenu "Linux/or32 Kernel Configuration"
config MMU
bool
default y
config UID16
bool
default y
config RWSEM_GENERIC_SPINLOCK
bool
default y
config RWSEM_XCHGADD_ALGORITHM
bool
default n
source "init/Kconfig"
menu "Processor type and features"
choice
prompt "Subarchitecture/SoC type"
default OR32_MARVIN
config OR32_MARVIN
bool "or1200/Marvin"
help
Marvin SoC
revision 0 prototype hardware implementation
config OR32_HIGHLAND
bool "or1200/Highland"
help
Highland SoC
revision 1
config OR32_GENERIC
bool "or1200/Generic"
help
Generic or1200 platform
endchoice
config OR32_SYS_CLK
int "System clock frequency [MHz]"
default 100
config OR32_MEMORY_SIZE
hex "System memory size [hex, bytes]"
default 01000000
config OR32_FLASH_BOOT
bool "Boot from FLASH"
default n
help
This alows you have support for extreamly simple bootloader
in the kernel. It will just copy kernel image from FLASH to RAM and
start executing it.
#
# Generic SoC defines
#
config OR32_MC_VERSION
int "Memory Controler Version (1 or 2)"
range 1 2
depends on OR32_GENERIC
default "1"
config OR32_MC_INIT
bool "Initilaze memory controler"
depends on OR32_GENERIC
default n
help
This option controls memory controler initizalization
When using bootloader, memory controler initialization is
usualy done by boot the bootloader. Memory timings might not
be ideal, so if you know the right timings it woun't hurt to
enable it.
If booting directly from flash you need to enable this option
and if neccessery provide memory timings.
config OR32_ICACHE_ENABLED
bool "Enable iCACHE"
depends on OR32_GENERIC
default n
config OR32_IC_SIZE
int "iCACHE size [bytes]"
depends on OR32_GENERIC
default 8192
config OR32_IC_LINE
int "iCACHE line size [bytes]"
depends on OR32_GENERIC
default 16
config OR32_DCACHE_ENABLED
bool "Enable dCACHE"
depends on OR32_GENERIC
default n
config OR32_DC_SIZE
int "dCACHE size [bytes]"
depends on OR32_GENERIC
default 8192
config OR32_DC_LINE
int "dCACHE line size [bytes]"
depends on OR32_GENERIC
default 16
config OR32_ITLB_ENTRIES
int "Number of iTLB entries"
depends on OR32_GENERIC
default 64
config OR32_DTLB_ENTRIES
int "Number of dTLB entries"
depends on OR32_GENERIC
default 64
config OR32_NO_SPR_SR_DSX
bool "use SPR_SR_DSX software emulation"
depends on OR32_GENERIC
default y
help
SPR_SR_DSX bit is status register bit indicating whether
the last exception has happened in delay slot.
OpenRISC architecture makes it optional to have it implemented
in hardware, and Marvin and Highland SoC do not have it.
Say N here if you know that your OpenRISC processor has
SPR_SR_DSX bit implemented. Say Y if you are unsure.
#
# Define implied options for the selected SoC
#
config OR32_CPU_OR1200
bool
depends on OR32_MARVIN || OR32_HIGHLAND || OR32_GENERIC
default y
config OR32_MC_VERSION
int
depends on !OR32_GENERIC
default "1" if OR32_MARVIN
default "2" if OR32_HIGHLAND
config OR32_MC_INIT
bool
depends on !OR32_GENERIC
default y
config OR32_ICACHE_ENABLED
bool
depends on !OR32_GENERIC
default n
config OR32_IC_SIZE
int
depends on !OR32_GENERIC
default 8192
config OR32_IC_LINE
int
depends on !OR32_GENERIC
default 16
config OR32_DCACHE_ENABLED
bool
depends on !OR32_GENERIC
default n
config OR32_DC_SIZE
int
depends on !OR32_GENERIC
default 8192
config OR32_DC_LINE
int
depends on !OR32_GENERIC
default 16
config OR32_ITLB_ENTRIES
int
depends on !OR32_GENERIC
default 64
config OR32_DTLB_ENTRIES
int
depends on !OR32_GENERIC
default 64
config OR32_NO_SPR_SR_DSX
bool
depends on !OR32_GENERIC
default y
menu "Debuging options"
config DEBUG_STACKOVERFLOW
bool "Check for kernel stack overflow"
default y
help
Make extra checks for space avaliable on stack in some
critical functions. This will cause kernel to run a bit slower,
but will catch most of kernel stack overruns and exit gracefuly.
Say Y if you are unsure.
config OR32_GUARD_PROTECTED_CORE
bool "Write protect read only part of kernel"
default y
help
Write to .text or .rodata sections is most probably kernel bug.
Enabling this will cause an oops at the instruction that tries to
corrupt kernel.
This has no performance implication but should help locating bugs.
Say Y if you are unsure.
config JUMP_UPON_UNHANDLED_EXCEPTION
bool "Try to die gracefully"
default y
help
Now this puts kernel into infinite loop after first oops. Till
your kernel crashes this doesn't have any influence.
Say Y if you are unsure.
config OR32_EXCEPTION_DEBUG
bool "Print processor state at each exception"
default n
help
This option will make your kernel unusable for all but kernel
debugging.
Say N if you are unsure.
endmenu
endmenu
# OpenRISC specific drivers
source "arch/or32/drivers/Kconfig"
menu "Bus options"
config PCI
bool "PCI support"
default n
help
Find out whether your system includes a PCI bus. PCI is the name of
a bus system, i.e. the way the CPU talks to the other stuff inside
your box. If you say Y here, the kernel will include drivers and
infrastructure code to support PCI bus devices.
config PCI_DOMAINS
bool
default PCI
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
# standard linux drivers
source "drivers/mtd/Kconfig"
source "drivers/parport/Kconfig"
source "drivers/pnp/Kconfig"
source "drivers/block/Kconfig"
source "drivers/md/Kconfig"
source "drivers/ide/Kconfig"
source "drivers/scsi/Kconfig"
source "drivers/ieee1394/Kconfig"
source "drivers/message/i2o/Kconfig"
source "net/Kconfig"
source "drivers/isdn/Kconfig"
source "drivers/telephony/Kconfig"
source "drivers/cdrom/Kconfig"
#
# input before char - char/joystick depends on it. As does USB.
#
source "drivers/input/Kconfig"
source "drivers/char/Kconfig"
#source drivers/misc/Config.in
source "drivers/media/Kconfig"
source "fs/Kconfig"
source "sound/Kconfig"
source "drivers/usb/Kconfig"
menu "Kernel hacking"
endmenu
source "security/Kconfig"
source "crypto/Kconfig"
source "lib/Kconfig"