OpenCores
URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [sh/] [mm/] [cache-sh2.c] - Rev 7

Go to most recent revision | Compare with Previous | Blame | View Log

/*
 * arch/sh/mm/cache-sh2.c
 *
 * Copyright (C) 2002 Paul Mundt
 *
 * Released under the terms of the GNU GPL v2.0.
 */
 
#include <linux/init.h>
#include <linux/mm.h>
 
#include <asm/cache.h>
#include <asm/addrspace.h>
#include <asm/processor.h>
#include <asm/cacheflush.h>
#include <asm/io.h>
 
void __flush_wback_region(void *start, int size)
{
	unsigned long v;
	unsigned long begin, end;
 
	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
		& ~(L1_CACHE_BYTES-1);
	for (v = begin; v < end; v+=L1_CACHE_BYTES) {
		/* FIXME cache purge */
		ctrl_outl((v & 0x1ffffc00), (v & 0x00000ff0) | 0x00000008);
	}
}
 
void __flush_purge_region(void *start, int size)
{
	unsigned long v;
	unsigned long begin, end;
 
	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
		& ~(L1_CACHE_BYTES-1);
	for (v = begin; v < end; v+=L1_CACHE_BYTES) {
		ctrl_outl((v & 0x1ffffc00), (v & 0x00000ff0) | 0x00000008);
	}
}
 
void __flush_invalidate_region(void *start, int size)
{
	unsigned long v;
	unsigned long begin, end;
 
	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
		& ~(L1_CACHE_BYTES-1);
	for (v = begin; v < end; v+=L1_CACHE_BYTES) {
		ctrl_outl((v & 0x1ffffc00), (v & 0x00000ff0) | 0x00000008);
	}
}
 
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.