URL
https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk
Subversion Repositories or1k_soc_on_altera_embedded_dev_kit
[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [sparc/] [mm/] [viking.S] - Rev 17
Go to most recent revision | Compare with Previous | Blame | View Log
/* $Id: viking.S,v 1.19 2001/12/21 04:56:15 davem Exp $* viking.S: High speed Viking cache/mmu operations** Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)* Copyright (C) 1997,1998,1999 Jakub Jelinek (jj@ultra.linux.cz)* Copyright (C) 1999 Pavel Semerad (semerad@ss1000.ms.mff.cuni.cz)*/#include <asm/ptrace.h>#include <asm/psr.h>#include <asm/asm-offsets.h>#include <asm/asi.h>#include <asm/mxcc.h>#include <asm/page.h>#include <asm/pgtsrmmu.h>#include <asm/viking.h>#include <asm/btfixup.h>#ifdef CONFIG_SMP.data.align 4sun4dsmp_flush_tlb_spin:.word 0#endif.text.align 4.globl viking_flush_cache_all, viking_flush_cache_mm.globl viking_flush_cache_range, viking_flush_cache_page.globl viking_flush_page, viking_mxcc_flush_page.globl viking_flush_page_for_dma, viking_flush_page_to_ram.globl viking_flush_sig_insns.globl viking_flush_tlb_all, viking_flush_tlb_mm.globl viking_flush_tlb_range, viking_flush_tlb_pageviking_flush_page:sethi %hi(PAGE_OFFSET), %g2sub %o0, %g2, %g3srl %g3, 12, %g1 ! ppage >> 12clr %o1 ! set counter, 0 - 127sethi %hi(PAGE_OFFSET + PAGE_SIZE - 0x80000000), %o3sethi %hi(0x80000000), %o4sethi %hi(VIKING_PTAG_VALID), %o5sethi %hi(2*PAGE_SIZE), %o0sethi %hi(PAGE_SIZE), %g7clr %o2 ! block counter, 0 - 35:sll %o1, 5, %g4or %g4, %o4, %g4 ! 0x80000000 | (set << 5)sll %o2, 26, %g5 ! block << 266:or %g5, %g4, %g5ldda [%g5] ASI_M_DATAC_TAG, %g2cmp %g3, %g1 ! ptag == ppage?bne 7finc %o2andcc %g2, %o5, %g0 ! ptag VALID?be 7fadd %g4, %o3, %g2 ! (PAGE_OFFSET + PAGE_SIZE) | (set << 5)ld [%g2], %g3ld [%g2 + %g7], %g3add %g2, %o0, %g2ld [%g2], %g3ld [%g2 + %g7], %g3add %g2, %o0, %g2ld [%g2], %g3ld [%g2 + %g7], %g3add %g2, %o0, %g2ld [%g2], %g3b 8fld [%g2 + %g7], %g37:cmp %o2, 3ble 6bsll %o2, 26, %g5 ! block << 268: inc %o1cmp %o1, 0x7fble 5bclr %o29: retlnopviking_mxcc_flush_page:sethi %hi(PAGE_OFFSET), %g2sub %o0, %g2, %g3sub %g3, -PAGE_SIZE, %g3 ! ppage + PAGE_SIZEsethi %hi(MXCC_SRCSTREAM), %o3 ! assume %hi(MXCC_SRCSTREAM) == %hi(MXCC_DESTSTREAM)mov 0x10, %g2 ! set cacheable bitor %o3, %lo(MXCC_SRCSTREAM), %o2or %o3, %lo(MXCC_DESSTREAM), %o3sub %g3, MXCC_STREAM_SIZE, %g36:stda %g2, [%o2] ASI_M_MXCCstda %g2, [%o3] ASI_M_MXCCandncc %g3, PAGE_MASK, %g0bne 6bsub %g3, MXCC_STREAM_SIZE, %g39: retlnopviking_flush_cache_page:viking_flush_cache_range:#ifndef CONFIG_SMPld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */#endifviking_flush_cache_mm:#ifndef CONFIG_SMPld [%o0 + AOFF_mm_context], %g1cmp %g1, -1bne viking_flush_cache_allnopb,a viking_flush_cache_out#endifviking_flush_cache_all:WINDOW_FLUSH(%g4, %g5)viking_flush_cache_out:retlnopviking_flush_tlb_all:mov 0x400, %g1retlsta %g0, [%g1] ASI_M_FLUSH_PROBEviking_flush_tlb_mm:mov SRMMU_CTX_REG, %g1ld [%o0 + AOFF_mm_context], %o1lda [%g1] ASI_M_MMUREGS, %g5#ifndef CONFIG_SMPcmp %o1, -1be 1f#endifmov 0x300, %g2sta %o1, [%g1] ASI_M_MMUREGSsta %g0, [%g2] ASI_M_FLUSH_PROBEretlsta %g5, [%g1] ASI_M_MMUREGS#ifndef CONFIG_SMP1: retlnop#endifviking_flush_tlb_range:ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */mov SRMMU_CTX_REG, %g1ld [%o0 + AOFF_mm_context], %o3lda [%g1] ASI_M_MMUREGS, %g5#ifndef CONFIG_SMPcmp %o3, -1be 2f#endifsethi %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4sta %o3, [%g1] ASI_M_MMUREGSand %o1, %o4, %o1add %o1, 0x200, %o1sta %g0, [%o1] ASI_M_FLUSH_PROBE1: sub %o1, %o4, %o1cmp %o1, %o2blu,a 1bsta %g0, [%o1] ASI_M_FLUSH_PROBEretlsta %g5, [%g1] ASI_M_MMUREGS#ifndef CONFIG_SMP2: retlnop#endifviking_flush_tlb_page:ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */mov SRMMU_CTX_REG, %g1ld [%o0 + AOFF_mm_context], %o3lda [%g1] ASI_M_MMUREGS, %g5#ifndef CONFIG_SMPcmp %o3, -1be 1f#endifand %o1, PAGE_MASK, %o1sta %o3, [%g1] ASI_M_MMUREGSsta %g0, [%o1] ASI_M_FLUSH_PROBEretlsta %g5, [%g1] ASI_M_MMUREGS#ifndef CONFIG_SMP1: retlnop#endifviking_flush_page_to_ram:viking_flush_page_for_dma:viking_flush_sig_insns:retlnop#ifdef CONFIG_SMP.globl sun4dsmp_flush_tlb_all, sun4dsmp_flush_tlb_mm.globl sun4dsmp_flush_tlb_range, sun4dsmp_flush_tlb_pagesun4dsmp_flush_tlb_all:sethi %hi(sun4dsmp_flush_tlb_spin), %g31: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5tst %g5bne 2fmov 0x400, %g1sta %g0, [%g1] ASI_M_FLUSH_PROBEretlstb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]2: tst %g5bne,a 2bldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5b,a 1bsun4dsmp_flush_tlb_mm:sethi %hi(sun4dsmp_flush_tlb_spin), %g31: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5tst %g5bne 2fmov SRMMU_CTX_REG, %g1ld [%o0 + AOFF_mm_context], %o1lda [%g1] ASI_M_MMUREGS, %g5mov 0x300, %g2sta %o1, [%g1] ASI_M_MMUREGSsta %g0, [%g2] ASI_M_FLUSH_PROBEsta %g5, [%g1] ASI_M_MMUREGSretlstb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]2: tst %g5bne,a 2bldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5b,a 1bsun4dsmp_flush_tlb_range:sethi %hi(sun4dsmp_flush_tlb_spin), %g31: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5tst %g5bne 3fmov SRMMU_CTX_REG, %g1ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ld [%o0 + AOFF_mm_context], %o3lda [%g1] ASI_M_MMUREGS, %g5sethi %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4sta %o3, [%g1] ASI_M_MMUREGSand %o1, %o4, %o1add %o1, 0x200, %o1sta %g0, [%o1] ASI_M_FLUSH_PROBE2: sub %o1, %o4, %o1cmp %o1, %o2blu,a 2bsta %g0, [%o1] ASI_M_FLUSH_PROBEsta %g5, [%g1] ASI_M_MMUREGSretlstb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]3: tst %g5bne,a 3bldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5b,a 1bsun4dsmp_flush_tlb_page:sethi %hi(sun4dsmp_flush_tlb_spin), %g31: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5tst %g5bne 2fmov SRMMU_CTX_REG, %g1ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ld [%o0 + AOFF_mm_context], %o3lda [%g1] ASI_M_MMUREGS, %g5and %o1, PAGE_MASK, %o1sta %o3, [%g1] ASI_M_MMUREGSsta %g0, [%o1] ASI_M_FLUSH_PROBEsta %g5, [%g1] ASI_M_MMUREGSretlstb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]2: tst %g5bne,a 2bldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5b,a 1bnop#endif
Go to most recent revision | Compare with Previous | Blame | View Log