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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [bench/] [bench_defines.v] - Rev 12

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`define FLASH_GENERIC
//`define FLASH_GENERIC_REGISTERED
 
`define SRAM_GENERIC
 
`define UART_DEBUG
 
// Set this to connect sram to slave0 intead of SDRAM for simulation
`define CONFIG_USE_SRAM
 

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