URL
https://opencores.org/ocsvn/pavr/pavr/trunk
Subversion Repositories pavr
[/] [pavr/] [tags/] [noReleaseTag/] [doc/] [html/] [group__pavr__hwres__iof__sregwr.html] - Rev 5
Go to most recent revision | Compare with Previous | Blame | View Log
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN"> <html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"> <title>SREG port</title> <link href="doxygen.css" rel="stylesheet" type="text/css"> </head><body> <!-- Generated by Doxygen 1.2.16 --> <center> <a class="qindex" href="main.html">Main Page</a> <a class="qindex" href="modules.html">Modules</a> <a class="qindex" href="pages.html">Related Pages</a> </center> <hr><h1>SREG port<br> <small> [<a class="el" href="group__pavr__hwres__iof.html">IO File</a>]</small> </h1><table border=0 cellpadding=0 cellspacing=0> </table> <dl compact><dt><b> SREG port connectivity</b><dd> <br> <div align="center"> <img src="pavr_hwres_iof_sreg_01.gif" alt="pavr_hwres_iof_sreg_01.gif"> </div> <br> </dl><dl compact><dt><b> Requests to this port</b><dd> <ul> <li>pavr_s5_alu_sregwr_rq <br> This signalizes that an instruction that uses the ALU wants to update the arithmetic flags. <br> Flags I (general interrupt enable, SREG(7)) and T (transfer bit, SREG(6)) are left unchanged. <br> <li>pavr_s5_setiflag_sregwr_rq <br> This sets the I flag. <br> Only RETI instruction needs this.<li>pavr_s5_clriflag_sregwr_rq <br> This clears the I flag. <br> No instruction explicitely requests this. <br> This is only requested when an interrupt is acknowledged (during the consequent implicit CALL). <br> <br> </ul> </dl><hr><address align="right"><small>Generated on Tue Dec 31 20:26:30 2002 for Pipelined AVR microcontroller by <a href="http://www.doxygen.org/index.html"> <img src="doxygen.png" alt="doxygen" align="middle" border=0 width=110 height=53></a>1.2.16 </small></address> </body> </html>
Go to most recent revision | Compare with Previous | Blame | View Log