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[/] [pci/] [tags/] [rel_00/] [rtl/] [verilog/] [timescale.v] - Rev 6
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////////////////////////////////////////////////////////////////////// //// //// //// File name "timescale.v" //// //// //// ////////////////////////////////////////////////////////////////////// // // CVS Revision History // // $Log: not supported by cvs2svn $ // // timescale directive is included in all core's modules for simulation purposes `timescale 1ns/10ps
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