Subversion Repositories pci_mini

# ----------------------------------------------------
# Timing constrains sample for the pci_mini IP-core
# ----------------------------------------------------
# Synopsys, Inc. constraint file
# filename
# Written on Wed Apr 13 17:34:51 2011
# by Synplify Pro, D-2009.12A Scope Editor
#
#  The user has to change the signal names here to the 
#  names used in the application's toplevel file.
# ----------------------------------------------------

#
# Collections
#

#
# Clocks
#

define_clock   {extPCICLK} -name {extPCICLK}  -freq 33 -clockgroup default_clkgroup_2


#
# Clock to Clock
#
define_clock_delay  -rise {extPCICLK} -rise {safeclock} -false

#
# Inputs/Outputs
#
define_input_delay               {extPCI_serr}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_perr}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_idsel}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_stop}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_devsel}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_trdy}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_irdy}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_frame}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_par}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_cbe[3:0]}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_input_delay               {extPCI_AD[31:0]}  23.0 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_output_delay              {extPCI_serr}  22.00 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_output_delay              {extPCI_perr}  22.00 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_output_delay              {extPCI_stop}  22.00 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_output_delay              {extPCI_devsel}  22.00 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_output_delay              {extPCI_trdy}  22.00 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_output_delay              {extPCI_par}  22.00 -improve 0.00 -route 0.00 -ref {extPCICLK:r}
define_output_delay              {extPCI_AD[31:0]}  22.00 -improve 0.00 -route 0.00 -ref {extPCICLK:r}


#
# Registers
#

#
# Delay Paths
#

#
# Attributes
#

#
# I/O Standards
#

#
# Compile Points
#

#
# Other
#