URL
https://opencores.org/ocsvn/pcie_sg_dma/pcie_sg_dma/trunk
Subversion Repositories pcie_sg_dma
[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE12.3/] [MySysGen/] [PCIe_UserLogic_00.mdl] - Rev 11
Compare with Previous | Blame | View Log
Model {
Name "PCIe_UserLogic_00"
Version 7.5
MdlSubVersion 0
GraphicalInterface {
NumRootInports 0
NumRootOutports 0
ParameterArgumentNames ""
ComputedModelVersion "1.1115"
NumModelReferences 0
NumTestPointedSignals 0
}
SavedCharacterEncoding "windows-1252"
PreLoadFcn "SP605_TS = 1/200e6;\nSP605_CLK = SP605_TS*1e9;\nUSER_TS = 1/200e6;\nUSER_CLK = USER_TS*1e9;\n\nPCIE"
"_TS = 1/125e6;\nPCIE_CLK = PCIE_TS*1e9;\n\nP_Size = 32;\n\nWR_LAT = 10 + round(P_Size*5/12);"
SaveDefaultBlockParams on
ScopeRefreshTime 0.035000
OverrideScopeRefreshTime on
DisableAllScopes off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
MinMaxOverflowArchiveMode "Overwrite"
MaxMDLFileLineLength 120
CloseFcn "rtwprivate ssgencode ModelCloseRequest MIG_Test_01"
InitFcn "SP605_TS = 1/200e6;\nSP605_CLK = SP605_TS*1e9;\nUSER_TS = 1/200e6;\nUSER_CLK = USER_TS*1e9;\n\nPCIE_TS"
" = 1/125e6;\nPCIE_CLK = PCIE_TS*1e9;\n\nP_Size = 32;\n\nWR_LAT = 10 + round(P_Size*5/12);"
Created "Mon Apr 11 16:26:04 2011"
Creator "Gigi"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "root"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Thu Mar 22 16:11:44 2012"
RTWModifiedTimeStamp 254331038
ModelVersionFormat "1.%<AutoIncrement:1115>"
ConfigurationManager "None"
SampleTimeColors on
SampleTimeAnnotations off
LibraryLinkDisplay "none"
WideLines off
ShowLineDimensions off
ShowPortDataTypes on
ShowLoopsOnError on
IgnoreBidirectionalLines off
ShowStorageClass off
ShowTestPointIcons off
ShowSignalResolutionIcons on
ShowViewerIcons off
SortedOrder off
ExecutionContextIcon off
ShowLinearizationAnnotations on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
SimulationMode "normal"
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
CovForceBlockReductionOff on
covSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeVarName "covCumulativeData"
CovCumulativeReport off
CovReportOnPause on
CovModelRefEnable "Off"
CovExternalEMLEnable off
ExtModeBatchMode off
ExtModeEnableFloating on
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigDurationFloating "auto"
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
BufferReuse on
ShowModelReferenceBlockVersion off
ShowModelReferenceBlockIO off
Array {
Type "Handle"
Dimension 1
Simulink.ConfigSet {
$ObjectID 1
Version "1.10.0"
Array {
Type "Handle"
Dimension 8
Simulink.SolverCC {
$ObjectID 2
Version "1.10.0"
StartTime "0.0"
StopTime "10.0"
AbsTol "auto"
FixedStep "auto"
InitialStep "auto"
MaxNumMinSteps "-1"
MaxOrder 5
ZcThreshold "auto"
ConsecutiveZCsStepRelTol "10*128*eps"
MaxConsecutiveZCs "1000"
ExtrapolationOrder 4
NumberNewtonIterations 1
MaxStep "auto"
MinStep "auto"
MaxConsecutiveMinStep "1"
RelTol "1e-3"
SolverMode "Auto"
Solver "ode45"
SolverName "ode45"
SolverJacobianMethodControl "auto"
ShapePreserveControl "DisableAll"
ZeroCrossControl "UseLocalSettings"
ZeroCrossAlgorithm "Nonadaptive"
AlgebraicLoopSolver "TrustRegion"
SolverResetMethod "Fast"
PositivePriorityOrder off
AutoInsertRateTranBlk off
SampleTimeConstraint "Unconstrained"
InsertRTBMode "Whenever possible"
}
Simulink.DataIOCC {
$ObjectID 3
Version "1.10.0"
Decimation "1"
ExternalInput "[t, u]"
FinalStateName "xFinal"
InitialState "xInitial"
LimitDataPoints on
MaxDataPoints "1000"
LoadExternalInput off
LoadInitialState off
SaveFinalState off
SaveCompleteFinalSimState off
SaveFormat "Array"
SaveOutput on
SaveState off
SignalLogging on
DSMLogging on
InspectSignalLogs off
SaveTime on
ReturnWorkspaceOutputs off
StateSaveName "xout"
TimeSaveName "tout"
OutputSaveName "yout"
SignalLoggingName "logsout"
DSMLoggingName "dsmout"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
ReturnWorkspaceOutputsName "out"
Refine "1"
}
Simulink.OptimizationCC {
$ObjectID 4
Version "1.10.0"
Array {
Type "Cell"
Dimension 7
Cell "BooleansAsBitfields"
Cell "PassReuseOutputArgsAs"
Cell "PassReuseOutputArgsThreshold"
Cell "ZeroExternalMemoryAtStartup"
Cell "ZeroInternalMemoryAtStartup"
Cell "OptimizeModelRefInitCode"
Cell "NoFixptDivByZeroProtection"
PropName "DisabledProps"
}
BlockReduction on
BooleanDataType on
ConditionallyExecuteInputs on
InlineParams off
UseIntDivNetSlope off
InlineInvariantSignals off
OptimizeBlockIOStorage on
BufferReuse on
EnhancedBackFolding off
StrengthReduction off
EnforceIntegerDowncast on
ExpressionFolding on
BooleansAsBitfields off
BitfieldContainerType "uint_T"
EnableMemcpy on
MemcpyThreshold 64
PassReuseOutputArgsAs "Structure reference"
ExpressionDepthLimit 2147483647
FoldNonRolledExpr on
LocalBlockOutputs on
RollThreshold 5
SystemCodeInlineAuto off
StateBitsets off
DataBitsets off
UseTempVars off
ZeroExternalMemoryAtStartup on
ZeroInternalMemoryAtStartup on
InitFltsAndDblsToZero off
NoFixptDivByZeroProtection off
EfficientFloat2IntCast off
EfficientMapNaN2IntZero on
OptimizeModelRefInitCode off
LifeSpan "inf"
MaxStackSize "Inherit from target"
BufferReusableBoundary on
SimCompilerOptimization "Off"
AccelVerboseBuild off
}
Simulink.DebuggingCC {
$ObjectID 5
Version "1.10.0"
RTPrefix "error"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
SignalInfNanChecking "none"
SignalRangeChecking "none"
ReadBeforeWriteMsg "UseLocalSettings"
WriteAfterWriteMsg "UseLocalSettings"
WriteAfterReadMsg "UseLocalSettings"
AlgebraicLoopMsg "warning"
ArtificialAlgebraicLoopMsg "warning"
SaveWithDisabledLinksMsg "warning"
SaveWithParameterizedLinksMsg "warning"
CheckSSInitialOutputMsg on
UnderspecifiedInitializationDetection "Classic"
MergeDetectMultiDrivingBlocksExec "none"
CheckExecutionContextPreStartOutputMsg off
CheckExecutionContextRuntimeOutputMsg off
SignalResolutionControl "UseLocalSettings"
BlockPriorityViolationMsg "warning"
MinStepSizeMsg "warning"
TimeAdjustmentMsg "none"
MaxConsecutiveZCsMsg "error"
SolverPrmCheckMsg "warning"
InheritedTsInSrcMsg "warning"
DiscreteInheritContinuousMsg "warning"
MultiTaskDSMMsg "error"
MultiTaskCondExecSysMsg "error"
MultiTaskRateTransMsg "error"
SingleTaskRateTransMsg "none"
TasksWithSamePriorityMsg "warning"
SigSpecEnsureSampleTimeMsg "warning"
CheckMatrixSingularityMsg "none"
IntegerOverflowMsg "warning"
Int32ToFloatConvMsg "warning"
ParameterDowncastMsg "error"
ParameterOverflowMsg "error"
ParameterUnderflowMsg "none"
ParameterPrecisionLossMsg "warning"
ParameterTunabilityLossMsg "warning"
FixptConstUnderflowMsg "none"
FixptConstOverflowMsg "none"
FixptConstPrecisionLossMsg "none"
UnderSpecifiedDataTypeMsg "none"
UnnecessaryDatatypeConvMsg "none"
VectorMatrixConversionMsg "none"
InvalidFcnCallConnMsg "error"
FcnCallInpInsideContextMsg "Use local settings"
SignalLabelMismatchMsg "none"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SFcnCompatibilityMsg "none"
UniqueDataStoreMsg "none"
BusObjectLabelMismatch "warning"
RootOutportRequireBusObject "warning"
AssertControl "UseLocalSettings"
EnableOverflowDetection off
ModelReferenceIOMsg "none"
ModelReferenceVersionMismatchMessage "none"
ModelReferenceIOMismatchMessage "none"
ModelReferenceCSMismatchMessage "none"
UnknownTsInhSupMsg "warning"
ModelReferenceDataLoggingMessage "warning"
ModelReferenceSymbolNameMessage "warning"
ModelReferenceExtraNoncontSigs "error"
StateNameClashWarn "warning"
SimStateInterfaceChecksumMismatchMsg "warning"
StrictBusMsg "ErrorLevel1"
BusNameAdapt "WarnAndRepair"
NonBusSignalsTreatedAsBus "none"
LoggingUnavailableSignals "error"
BlockIODiagnostic "none"
}
Simulink.HardwareCC {
$ObjectID 6
Version "1.10.0"
ProdBitPerChar 8
ProdBitPerShort 16
ProdBitPerInt 32
ProdBitPerLong 32
ProdIntDivRoundTo "Undefined"
ProdEndianess "Unspecified"
ProdWordSize 32
ProdShiftRightIntArith on
ProdHWDeviceType "32-bit Generic"
TargetBitPerChar 8
TargetBitPerShort 16
TargetBitPerInt 32
TargetBitPerLong 32
TargetShiftRightIntArith on
TargetIntDivRoundTo "Undefined"
TargetEndianess "Unspecified"
TargetWordSize 32
TargetTypeEmulationWarnSuppressLevel 0
TargetPreprocMaxBitsSint 32
TargetPreprocMaxBitsUint 32
TargetHWDeviceType "Specified"
TargetUnknown off
ProdEqTarget on
}
Simulink.ModelReferenceCC {
$ObjectID 7
Version "1.10.0"
UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
CheckModelReferenceTargetMessage "error"
EnableParallelModelReferenceBuilds off
ParallelModelReferenceMATLABWorkerInit "None"
ModelReferenceNumInstancesAllowed "Multi"
PropagateVarSize "Infer from blocks in model"
ModelReferencePassRootInputsByReference on
ModelReferenceMinAlgLoopOccurrences off
PropagateSignalLabelsOutOfModel off
SupportModelReferenceSimTargetCustomCode off
}
Simulink.SFSimCC {
$ObjectID 8
Version "1.10.0"
SFSimEnableDebug on
SFSimOverflowDetection on
SFSimEcho on
SimBlas on
SimCtrlC on
SimExtrinsic on
SimIntegrity on
SimUseLocalCustomCode off
SimBuildMode "sf_incremental_build"
}
Simulink.RTWCC {
$BackupClass "Simulink.RTWCC"
$ObjectID 9
Version "1.10.0"
Array {
Type "Cell"
Dimension 6
Cell "IncludeHyperlinkInReport"
Cell "GenerateTraceInfo"
Cell "GenerateTraceReport"
Cell "GenerateTraceReportSl"
Cell "GenerateTraceReportSf"
Cell "GenerateTraceReportEml"
PropName "DisabledProps"
}
SystemTargetFile "grt.tlc"
GenCodeOnly off
MakeCommand "make_rtw"
GenerateMakefile on
TemplateMakefile "grt_default_tmf"
GenerateReport off
SaveLog off
RTWVerbose on
RetainRTWFile off
ProfileTLC off
TLCDebug off
TLCCoverage off
TLCAssert off
ProcessScriptMode "Default"
ConfigurationMode "Optimized"
ConfigAtBuild off
RTWUseLocalCustomCode off
RTWUseSimCustomCode off
IncludeHyperlinkInReport off
LaunchReport off
TargetLang "C"
IncludeBusHierarchyInRTWFileBlockHierarchyMap off
IncludeERTFirstTime off
GenerateTraceInfo off
GenerateTraceReport off
GenerateTraceReportSl off
GenerateTraceReportSf off
GenerateTraceReportEml off
GenerateCodeInfo off
RTWCompilerOptimization "Off"
CheckMdlBeforeBuild "Off"
CustomRebuildMode "OnUpdate"
Array {
Type "Handle"
Dimension 2
Simulink.CodeAppCC {
$ObjectID 10
Version "1.10.0"
Array {
Type "Cell"
Dimension 19
Cell "IgnoreCustomStorageClasses"
Cell "IgnoreTestpoints"
Cell "InsertBlockDesc"
Cell "SFDataObjDesc"
Cell "SimulinkDataObjDesc"
Cell "DefineNamingRule"
Cell "SignalNamingRule"
Cell "ParamNamingRule"
Cell "InlinedPrmAccess"
Cell "CustomSymbolStr"
Cell "CustomSymbolStrGlobalVar"
Cell "CustomSymbolStrType"
Cell "CustomSymbolStrField"
Cell "CustomSymbolStrFcn"
Cell "CustomSymbolStrFcnArg"
Cell "CustomSymbolStrBlkIO"
Cell "CustomSymbolStrTmpVar"
Cell "CustomSymbolStrMacro"
Cell "ReqsInCode"
PropName "DisabledProps"
}
ForceParamTrailComments off
GenerateComments on
IgnoreCustomStorageClasses on
IgnoreTestpoints off
IncHierarchyInIds off
MaxIdLength 31
PreserveName off
PreserveNameWithParent off
ShowEliminatedStatement off
IncAutoGenComments off
SimulinkDataObjDesc off
SFDataObjDesc off
IncDataTypeInIds off
MangleLength 1
CustomSymbolStrGlobalVar "$R$N$M"
CustomSymbolStrType "$N$R$M"
CustomSymbolStrField "$N$M"
CustomSymbolStrFcn "$R$N$M$F"
CustomSymbolStrFcnArg "rt$I$N$M"
CustomSymbolStrBlkIO "rtb_$N$M"
CustomSymbolStrTmpVar "$N$M"
CustomSymbolStrMacro "$R$N$M"
DefineNamingRule "None"
ParamNamingRule "None"
SignalNamingRule "None"
InsertBlockDesc off
SimulinkBlockComments on
EnableCustomComments off
InlinedPrmAccess "Literals"
ReqsInCode off
UseSimReservedNames off
}
Simulink.GRTTargetCC {
$BackupClass "Simulink.TargetCC"
$ObjectID 11
Version "1.10.0"
Array {
Type "Cell"
Dimension 16
Cell "GeneratePreprocessorConditionals"
Cell "IncludeMdlTerminateFcn"
Cell "CombineOutputUpdateFcns"
Cell "SuppressErrorStatus"
Cell "ERTCustomFileBanners"
Cell "GenerateSampleERTMain"
Cell "GenerateTestInterfaces"
Cell "ModelStepFunctionPrototypeControlCompliant"
Cell "CPPClassGenCompliant"
Cell "MultiInstanceERTCode"
Cell "PurelyIntegerCode"
Cell "PortableWordSizes"
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
Cell "SupportNonInlinedSFcns"
PropName "DisabledProps"
}
TargetFcnLib "ansi_tfl_table_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
TargetFunctionLibrary "ANSI_C"
UtilityFuncGeneration "Auto"
ERTMultiwordTypeDef "System defined"
ERTCodeCoverageTool "None"
ERTMultiwordLength 256
MultiwordLength 2048
GenerateFullHeader on
GenerateSampleERTMain off
GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
ParMdlRefBuildCompliant on
CompOptLevelCompliant on
IncludeMdlTerminateFcn on
GeneratePreprocessorConditionals "Disable all"
CombineOutputUpdateFcns off
SuppressErrorStatus off
ERTFirstTimeCompliant off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
SupportVariableSizeSignals off
EnableShiftOperators on
ParenthesesLevel "Nominal"
PortableWordSizes off
ModelStepFunctionPrototypeControlCompliant off
CPPClassGenCompliant off
AutosarCompliant off
UseMalloc off
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
PropName "Components"
}
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
ConfigPrmDlgPosition " [ 243, 69, 1123, 699 ] "
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 1
}
BlockDefaults {
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
BlockRotation 0
BlockMirror off
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
BlockParameterDefaults {
Block {
BlockType SubSystem
ShowPortLabels "FromPortIcon"
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
CheckFcnCallInpInsideContextMsg off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
}
System {
Name "PCIe_UserLogic_00"
Location [2, 73, 1918, 1146]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 212
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "148"
ReportName "simulink-default.rpt"
SIDHighWatermark 3424
Block {
BlockType SubSystem
Name "INOUT_LOGIC"
SID 2106
Ports []
Position [50, 119, 150, 161]
LibraryVersion "1.216"
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "INOUT_LOGIC"
Location [2, 77, 1892, 1150]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Reference
Name " System Generator"
SID 2107
Tag "genX"
Ports []
Position [57, 47, 107, 97]
ShowName off
AttributesFormatString "System\\nGenerator"
LibraryVersion "1.2"
UserDataPersistent on
UserData "DataTag0"
SourceBlock "xbsIndex_r4/ System Generator"
SourceType "Xilinx System Generator Block"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
infoedit " System Generator"
xilinxfamily "virtex6"
part "xc6vlx240t"
speed "-3"
package "ff784"
synthesis_tool "XST"
clock_wrapper "Clock Enables"
directory "C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_IN"
"OUT_LOGIC"
testbench off
simulink_period "PCIE_TS"
sysclk_period "USER_CLK"
dcm_input_clock_period "5"
incr_netlist off
trim_vbits "Everywhere in SubSystem"
dbl_ovrd "According to Block Masks"
core_generation "According to Block Masks"
run_coregen off
deprecated_control off
eval_field "0"
has_advanced_control "0"
sggui_pos "198,253,464,470"
block_type "sysgen"
block_version "12.3"
sg_icon_stat "50,50,0,0,token,white,0,58c5b5770fe5f7c311f53dbc6e73f0f6,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);\npat"
"ch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 "
"],[0.933333 0.203922 0.141176 ]);\npatch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 "
"],[0.698039 0.0313725 0.219608 ]);\npatch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 "
"],[0.933333 0.203922 0.141176 ]);\npatch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.15"
"5 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','CO"
"MMENT: begin icon text');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant1"
SID 2841
Ports [0, 1]
Position [755, 47, 810, 73]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "1"
n_bits "32"
bin_pt "0"
explicit_period on
period "PCIE_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "55,26,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
"3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
" 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
" 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
"_label('output',1,'1');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant5"
SID 2214
Ports [0, 1]
Position [360, 47, 415, 73]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "1"
n_bits "32"
bin_pt "0"
explicit_period on
period "PCIE_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "55,26,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
"3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
" 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
" 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
"_label('output',1,'1');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "DMA_Host2Board_Busy"
SID 2345
Ports [1, 1]
Position [305, 305, 370, 325]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "DMA_Host2Board_Done"
SID 2346
Ports [1, 1]
Position [305, 370, 370, 390]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "From Register1"
SID 2225
Ports [0, 1]
Position [1285, 99, 1340, 121]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register01rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register10"
SID 2334
Ports [0, 1]
Position [1285, 469, 1340, 491]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register05rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register11"
SID 2337
Ports [0, 1]
Position [1285, 574, 1340, 596]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register06rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register12"
SID 2338
Ports [0, 1]
Position [1285, 624, 1340, 646]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register06rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register13"
SID 2341
Ports [0, 1]
Position [1285, 679, 1340, 701]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register07rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register14"
SID 2342
Ports [0, 1]
Position [1285, 729, 1340, 751]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register07rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register15"
SID 2842
Ports [0, 1]
Position [1285, 799, 1340, 821]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register08rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register16"
SID 2843
Ports [0, 1]
Position [1285, 849, 1340, 871]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register08rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register17"
SID 2846
Ports [0, 1]
Position [1285, 899, 1340, 921]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register09rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register18"
SID 2847
Ports [0, 1]
Position [1285, 949, 1340, 971]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register09rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register19"
SID 2850
Ports [0, 1]
Position [1285, 1009, 1340, 1031]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register10rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register2"
SID 2227
Ports [0, 1]
Position [1285, 204, 1340, 226]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register02rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register20"
SID 2851
Ports [0, 1]
Position [1285, 1059, 1340, 1081]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register10rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register21"
SID 3294
Ports [0, 1]
Position [1285, 1134, 1340, 1156]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register11rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register22"
SID 3295
Ports [0, 1]
Position [1285, 1184, 1340, 1206]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register11rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register23"
SID 3296
Ports [0, 1]
Position [1285, 1254, 1340, 1276]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register12rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register24"
SID 3297
Ports [0, 1]
Position [1285, 1304, 1340, 1326]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register12rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register25"
SID 3298
Ports [0, 1]
Position [1285, 1354, 1340, 1376]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register13rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register26"
SID 3299
Ports [0, 1]
Position [1285, 1404, 1340, 1426]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register13rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register27"
SID 3300
Ports [0, 1]
Position [1285, 1464, 1340, 1486]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register14rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register28"
SID 3301
Ports [0, 1]
Position [1285, 1514, 1340, 1536]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register14rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register3"
SID 2210
Ports [0, 1]
Position [1285, 49, 1340, 71]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register01rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register4"
SID 2329
Ports [0, 1]
Position [1285, 414, 1340, 436]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register04rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register5"
SID 2228
Ports [0, 1]
Position [1285, 154, 1340, 176]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register02rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "136,101,381,262"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register6"
SID 2229
Ports [0, 1]
Position [1285, 304, 1340, 326]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register03rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register7"
SID 2230
Ports [0, 1]
Position [1285, 254, 1340, 276]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register03rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register8"
SID 2330
Ports [0, 1]
Position [1285, 364, 1340, 386]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register04rd'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register9"
SID 2333
Ports [0, 1]
Position [1285, 519, 1340, 541]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register05rv'"
init "0"
period "PCIE_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "To Register1"
SID 2215
Ports [2, 1]
Position [465, 166, 525, 199]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'debug2i'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register10"
SID 2313
Ports [2, 1]
Position [465, 1051, 525, 1084]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register04tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register11"
SID 2314
Ports [2, 1]
Position [465, 986, 525, 1019]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register04td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register12"
SID 2317
Ports [2, 1]
Position [465, 1196, 525, 1229]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register05tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register13"
SID 2318
Ports [2, 1]
Position [465, 1131, 525, 1164]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register05td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register14"
SID 2321
Ports [2, 1]
Position [465, 1351, 525, 1384]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register06tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register15"
SID 2322
Ports [2, 1]
Position [465, 1286, 525, 1319]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register06td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register16"
SID 2323
Ports [2, 1]
Position [465, 1496, 525, 1529]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register07tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register17"
SID 2324
Ports [2, 1]
Position [465, 1431, 525, 1464]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register07td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register18"
SID 2348
Ports [2, 1]
Position [465, 306, 525, 339]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'DMA_Host2Board_Busy'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register19"
SID 2349
Ports [2, 1]
Position [465, 371, 525, 404]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'DMA_Host2Board_Done'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register2"
SID 2216
Ports [2, 1]
Position [465, 226, 525, 259]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'debug3i'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register20"
SID 2350
Ports [2, 1]
Position [465, 431, 525, 464]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'debug4i'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register21"
SID 2829
Ports [2, 1]
Position [845, 341, 905, 374]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register09tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register22"
SID 2830
Ports [2, 1]
Position [845, 276, 905, 309]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register09td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register23"
SID 2833
Ports [2, 1]
Position [845, 501, 905, 534]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register10tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register24"
SID 2834
Ports [2, 1]
Position [845, 436, 905, 469]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register10td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register25"
SID 2837
Ports [2, 1]
Position [845, 186, 905, 219]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register08tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register26"
SID 2838
Ports [2, 1]
Position [845, 121, 905, 154]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register08td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register27"
SID 3278
Ports [2, 1]
Position [845, 641, 905, 674]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register11tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register28"
SID 3279
Ports [2, 1]
Position [845, 576, 905, 609]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register11td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register29"
SID 3282
Ports [2, 1]
Position [845, 771, 905, 804]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register12tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register3"
SID 2217
Ports [2, 1]
Position [465, 631, 525, 664]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register01tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register30"
SID 3283
Ports [2, 1]
Position [845, 706, 905, 739]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register12td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register31"
SID 3286
Ports [2, 1]
Position [845, 906, 905, 939]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register13tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register32"
SID 3287
Ports [2, 1]
Position [845, 841, 905, 874]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register13td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register33"
SID 3290
Ports [2, 1]
Position [845, 1036, 905, 1069]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register14tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register34"
SID 3291
Ports [2, 1]
Position [845, 971, 905, 1004]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register14td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register4"
SID 2221
Ports [2, 1]
Position [465, 766, 525, 799]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register02tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register5"
SID 2222
Ports [2, 1]
Position [465, 701, 525, 734]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register02td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register6"
SID 2235
Ports [2, 1]
Position [465, 106, 525, 139]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'debug1i'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register7"
SID 2213
Ports [2, 1]
Position [465, 566, 525, 599]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register01td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register8"
SID 2223
Ports [2, 1]
Position [465, 901, 525, 934]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register03tv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register9"
SID 2224
Ports [2, 1]
Position [465, 836, 525, 869]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register03td'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "debug_in_1i"
SID 2193
Ports [1, 1]
Position [305, 105, 370, 125]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "debug_in_2i"
SID 2194
Ports [1, 1]
Position [305, 165, 370, 185]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "debug_in_3i"
SID 2195
Ports [1, 1]
Position [305, 225, 370, 245]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "debug_in_4i"
SID 2347
Ports [1, 1]
Position [305, 430, 370, 450]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg01_rd"
SID 2196
Ports [1, 1]
Position [1415, 50, 1475, 70]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg01_rv"
SID 2197
Ports [1, 1]
Position [1415, 100, 1475, 120]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg01_td"
SID 2198
Ports [1, 1]
Position [310, 565, 375, 585]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg01_tv"
SID 2199
Ports [1, 1]
Position [310, 630, 375, 650]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg02_rd"
SID 2200
Ports [1, 1]
Position [1415, 155, 1475, 175]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg02_rv"
SID 2201
Ports [1, 1]
Position [1415, 205, 1475, 225]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg02_td"
SID 2202
Ports [1, 1]
Position [310, 700, 375, 720]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg02_tv"
SID 2203
Ports [1, 1]
Position [310, 765, 375, 785]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg03_rd"
SID 2204
Ports [1, 1]
Position [1415, 255, 1475, 275]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg03_rv"
SID 2205
Ports [1, 1]
Position [1415, 305, 1475, 325]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg03_td"
SID 2206
Ports [1, 1]
Position [310, 835, 375, 855]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg03_tv"
SID 2207
Ports [1, 1]
Position [310, 900, 375, 920]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg04_rd"
SID 2331
Ports [1, 1]
Position [1415, 365, 1475, 385]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg04_rv"
SID 2332
Ports [1, 1]
Position [1415, 415, 1475, 435]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg04_td"
SID 2315
Ports [1, 1]
Position [310, 985, 375, 1005]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg04_tv"
SID 2316
Ports [1, 1]
Position [310, 1050, 375, 1070]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg05_rd"
SID 2335
Ports [1, 1]
Position [1415, 470, 1475, 490]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg05_rv"
SID 2336
Ports [1, 1]
Position [1415, 520, 1475, 540]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg05_td"
SID 2319
Ports [1, 1]
Position [310, 1130, 375, 1150]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg05_tv"
SID 2320
Ports [1, 1]
Position [310, 1195, 375, 1215]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg06_rd"
SID 2339
Ports [1, 1]
Position [1415, 575, 1475, 595]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg06_rv"
SID 2340
Ports [1, 1]
Position [1415, 625, 1475, 645]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg06_td"
SID 2325
Ports [1, 1]
Position [310, 1285, 375, 1305]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg06_tv"
SID 2327
Ports [1, 1]
Position [310, 1350, 375, 1370]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg07_rd"
SID 2343
Ports [1, 1]
Position [1415, 680, 1475, 700]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg07_rv"
SID 2344
Ports [1, 1]
Position [1415, 730, 1475, 750]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg07_td"
SID 2326
Ports [1, 1]
Position [310, 1430, 375, 1450]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg07_tv"
SID 2328
Ports [1, 1]
Position [310, 1495, 375, 1515]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg08_rd"
SID 2844
Ports [1, 1]
Position [1415, 800, 1475, 820]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg08_rv"
SID 2845
Ports [1, 1]
Position [1415, 850, 1475, 870]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg08_td"
SID 2839
Ports [1, 1]
Position [690, 120, 755, 140]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg08_tv"
SID 2840
Ports [1, 1]
Position [690, 185, 755, 205]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg09_rd"
SID 2848
Ports [1, 1]
Position [1415, 900, 1475, 920]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg09_rv"
SID 2849
Ports [1, 1]
Position [1415, 950, 1475, 970]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg09_td"
SID 2831
Ports [1, 1]
Position [690, 275, 755, 295]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg09_tv"
SID 2832
Ports [1, 1]
Position [690, 340, 755, 360]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg10_rd"
SID 2852
Ports [1, 1]
Position [1415, 1010, 1475, 1030]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg10_rv"
SID 2853
Ports [1, 1]
Position [1415, 1060, 1475, 1080]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg10_td"
SID 2835
Ports [1, 1]
Position [690, 435, 755, 455]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg10_tv"
SID 2836
Ports [1, 1]
Position [690, 500, 755, 520]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg11_rd"
SID 3302
Ports [1, 1]
Position [1415, 1135, 1475, 1155]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg11_rv"
SID 3303
Ports [1, 1]
Position [1415, 1185, 1475, 1205]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg11_td"
SID 3280
Ports [1, 1]
Position [690, 575, 755, 595]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg11_tv"
SID 3281
Ports [1, 1]
Position [690, 640, 755, 660]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg12_rd"
SID 3304
Ports [1, 1]
Position [1415, 1255, 1475, 1275]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg12_rv"
SID 3305
Ports [1, 1]
Position [1415, 1305, 1475, 1325]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg12_td"
SID 3284
Ports [1, 1]
Position [690, 705, 755, 725]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg12_tv"
SID 3285
Ports [1, 1]
Position [690, 770, 755, 790]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg13_rd"
SID 3306
Ports [1, 1]
Position [1415, 1355, 1475, 1375]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg13_rv"
SID 3307
Ports [1, 1]
Position [1415, 1405, 1475, 1425]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg13_td"
SID 3288
Ports [1, 1]
Position [690, 840, 755, 860]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg13_tv"
SID 3289
Ports [1, 1]
Position [690, 905, 755, 925]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg14_rd"
SID 3308
Ports [1, 1]
Position [1415, 1465, 1475, 1485]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg14_rv"
SID 3309
Ports [1, 1]
Position [1415, 1515, 1475, 1535]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "reg14_td"
SID 3292
Ports [1, 1]
Position [690, 970, 755, 990]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "reg14_tv"
SID 3293
Ports [1, 1]
Position [690, 1035, 755, 1055]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "PCIE_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Line {
SrcBlock "debug_in_1i"
SrcPort 1
DstBlock "To Register6"
DstPort 1
}
Line {
SrcBlock "debug_in_2i"
SrcPort 1
DstBlock "To Register1"
DstPort 1
}
Line {
SrcBlock "debug_in_3i"
SrcPort 1
DstBlock "To Register2"
DstPort 1
}
Line {
SrcBlock "Constant5"
SrcPort 1
Points [15, 0; 0, 70]
Branch {
Points [0, 60]
Branch {
DstBlock "To Register1"
DstPort 2
}
Branch {
Points [0, 60]
Branch {
DstBlock "To Register2"
DstPort 2
}
Branch {
Points [0, 80]
Branch {
DstBlock "To Register18"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register19"
DstPort 2
}
Branch {
Points [0, 60]
Branch {
Points [0, 135]
Branch {
DstBlock "To Register7"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register3"
DstPort 2
}
Branch {
Points [0, 70]
Branch {
DstBlock "To Register5"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register4"
DstPort 2
}
Branch {
Points [0, 70]
Branch {
DstBlock "To Register9"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register8"
DstPort 2
}
Branch {
Points [0, 85]
Branch {
DstBlock "To Register11"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register10"
DstPort 2
}
Branch {
Points [0, 80]
Branch {
DstBlock "To Register13"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register12"
DstPort 2
}
Branch {
Points [0, 90]
Branch {
Points [0, 65]
Branch {
Points [0, 80]
Branch {
DstBlock "To Register17"
DstPort 2
}
Branch {
Points [0, 65]
DstBlock "To Register16"
DstPort 2
}
}
Branch {
DstBlock "To Register14"
DstPort 2
}
}
Branch {
DstBlock "To Register15"
DstPort 2
}
}
}
}
}
}
}
}
}
}
}
}
Branch {
DstBlock "To Register20"
DstPort 2
}
}
}
}
}
}
Branch {
DstBlock "To Register6"
DstPort 2
}
}
Line {
SrcBlock "reg01_td"
SrcPort 1
DstBlock "To Register7"
DstPort 1
}
Line {
SrcBlock "reg01_tv"
SrcPort 1
DstBlock "To Register3"
DstPort 1
}
Line {
SrcBlock "reg02_td"
SrcPort 1
DstBlock "To Register5"
DstPort 1
}
Line {
SrcBlock "reg02_tv"
SrcPort 1
DstBlock "To Register4"
DstPort 1
}
Line {
SrcBlock "reg03_td"
SrcPort 1
DstBlock "To Register9"
DstPort 1
}
Line {
SrcBlock "reg03_tv"
SrcPort 1
DstBlock "To Register8"
DstPort 1
}
Line {
SrcBlock "From Register3"
SrcPort 1
DstBlock "reg01_rd"
DstPort 1
}
Line {
SrcBlock "From Register1"
SrcPort 1
DstBlock "reg01_rv"
DstPort 1
}
Line {
SrcBlock "From Register5"
SrcPort 1
DstBlock "reg02_rd"
DstPort 1
}
Line {
SrcBlock "From Register2"
SrcPort 1
DstBlock "reg02_rv"
DstPort 1
}
Line {
SrcBlock "From Register7"
SrcPort 1
DstBlock "reg03_rd"
DstPort 1
}
Line {
SrcBlock "From Register6"
SrcPort 1
DstBlock "reg03_rv"
DstPort 1
}
Line {
SrcBlock "reg04_td"
SrcPort 1
DstBlock "To Register11"
DstPort 1
}
Line {
SrcBlock "reg04_tv"
SrcPort 1
DstBlock "To Register10"
DstPort 1
}
Line {
SrcBlock "reg05_td"
SrcPort 1
DstBlock "To Register13"
DstPort 1
}
Line {
SrcBlock "reg05_tv"
SrcPort 1
DstBlock "To Register12"
DstPort 1
}
Line {
SrcBlock "reg06_td"
SrcPort 1
DstBlock "To Register15"
DstPort 1
}
Line {
SrcBlock "reg06_tv"
SrcPort 1
DstBlock "To Register14"
DstPort 1
}
Line {
SrcBlock "reg07_td"
SrcPort 1
DstBlock "To Register17"
DstPort 1
}
Line {
SrcBlock "reg07_tv"
SrcPort 1
DstBlock "To Register16"
DstPort 1
}
Line {
SrcBlock "From Register8"
SrcPort 1
DstBlock "reg04_rd"
DstPort 1
}
Line {
SrcBlock "From Register4"
SrcPort 1
DstBlock "reg04_rv"
DstPort 1
}
Line {
SrcBlock "From Register10"
SrcPort 1
DstBlock "reg05_rd"
DstPort 1
}
Line {
SrcBlock "From Register9"
SrcPort 1
DstBlock "reg05_rv"
DstPort 1
}
Line {
SrcBlock "From Register11"
SrcPort 1
DstBlock "reg06_rd"
DstPort 1
}
Line {
SrcBlock "From Register12"
SrcPort 1
DstBlock "reg06_rv"
DstPort 1
}
Line {
SrcBlock "From Register13"
SrcPort 1
DstBlock "reg07_rd"
DstPort 1
}
Line {
SrcBlock "From Register14"
SrcPort 1
DstBlock "reg07_rv"
DstPort 1
}
Line {
SrcBlock "DMA_Host2Board_Busy"
SrcPort 1
DstBlock "To Register18"
DstPort 1
}
Line {
SrcBlock "DMA_Host2Board_Done"
SrcPort 1
DstBlock "To Register19"
DstPort 1
}
Line {
SrcBlock "debug_in_4i"
SrcPort 1
DstBlock "To Register20"
DstPort 1
}
Line {
SrcBlock "reg09_td"
SrcPort 1
DstBlock "To Register22"
DstPort 1
}
Line {
SrcBlock "reg09_tv"
SrcPort 1
DstBlock "To Register21"
DstPort 1
}
Line {
SrcBlock "reg10_td"
SrcPort 1
DstBlock "To Register24"
DstPort 1
}
Line {
SrcBlock "reg10_tv"
SrcPort 1
DstBlock "To Register23"
DstPort 1
}
Line {
SrcBlock "Constant1"
SrcPort 1
Points [0, 85]
Branch {
DstBlock "To Register26"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register25"
DstPort 2
}
Branch {
Points [0, 90]
Branch {
DstBlock "To Register22"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register21"
DstPort 2
}
Branch {
Points [0, 95]
Branch {
DstBlock "To Register24"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register23"
DstPort 2
}
Branch {
Points [0, 75]
Branch {
DstBlock "To Register28"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register27"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register30"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register29"
DstPort 2
}
Branch {
Points [0, 70]
Branch {
DstBlock "To Register32"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register31"
DstPort 2
}
Branch {
Points [0, 65]
Branch {
DstBlock "To Register34"
DstPort 2
}
Branch {
Points [0, 65]
DstBlock "To Register33"
DstPort 2
}
}
}
}
}
}
}
}
}
}
}
}
}
}
Line {
SrcBlock "reg08_td"
SrcPort 1
DstBlock "To Register26"
DstPort 1
}
Line {
SrcBlock "reg08_tv"
SrcPort 1
DstBlock "To Register25"
DstPort 1
}
Line {
SrcBlock "From Register15"
SrcPort 1
DstBlock "reg08_rd"
DstPort 1
}
Line {
SrcBlock "From Register16"
SrcPort 1
DstBlock "reg08_rv"
DstPort 1
}
Line {
SrcBlock "From Register17"
SrcPort 1
DstBlock "reg09_rd"
DstPort 1
}
Line {
SrcBlock "From Register18"
SrcPort 1
DstBlock "reg09_rv"
DstPort 1
}
Line {
SrcBlock "From Register19"
SrcPort 1
DstBlock "reg10_rd"
DstPort 1
}
Line {
SrcBlock "From Register20"
SrcPort 1
DstBlock "reg10_rv"
DstPort 1
}
Line {
SrcBlock "reg11_td"
SrcPort 1
DstBlock "To Register28"
DstPort 1
}
Line {
SrcBlock "reg11_tv"
SrcPort 1
DstBlock "To Register27"
DstPort 1
}
Line {
SrcBlock "reg12_td"
SrcPort 1
DstBlock "To Register30"
DstPort 1
}
Line {
SrcBlock "reg12_tv"
SrcPort 1
DstBlock "To Register29"
DstPort 1
}
Line {
SrcBlock "reg13_td"
SrcPort 1
DstBlock "To Register32"
DstPort 1
}
Line {
SrcBlock "reg13_tv"
SrcPort 1
DstBlock "To Register31"
DstPort 1
}
Line {
SrcBlock "reg14_td"
SrcPort 1
DstBlock "To Register34"
DstPort 1
}
Line {
SrcBlock "reg14_tv"
SrcPort 1
DstBlock "To Register33"
DstPort 1
}
Line {
SrcBlock "From Register21"
SrcPort 1
DstBlock "reg11_rd"
DstPort 1
}
Line {
SrcBlock "From Register22"
SrcPort 1
DstBlock "reg11_rv"
DstPort 1
}
Line {
SrcBlock "From Register23"
SrcPort 1
DstBlock "reg12_rd"
DstPort 1
}
Line {
SrcBlock "From Register24"
SrcPort 1
DstBlock "reg12_rv"
DstPort 1
}
Line {
SrcBlock "From Register25"
SrcPort 1
DstBlock "reg13_rd"
DstPort 1
}
Line {
SrcBlock "From Register26"
SrcPort 1
DstBlock "reg13_rv"
DstPort 1
}
Line {
SrcBlock "From Register27"
SrcPort 1
DstBlock "reg14_rd"
DstPort 1
}
Line {
SrcBlock "From Register28"
SrcPort 1
DstBlock "reg14_rv"
DstPort 1
}
}
}
Block {
BlockType Reference
Name "Multiple Subsystem\nGenerator"
SID 2234
Tag "xlStitcher"
Ports []
Position [125, 17, 190, 82]
LibraryVersion "1.2"
UserDataPersistent on
UserData "DataTag1"
SourceBlock "xbsIndex_r4/Multiple Subsystem\nGenerator"
SourceType "Xilinx Subsystem Generator Block"
infoedit "Multiple Subsystem\\nGenerator"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "multiple_subsystem_generator"
block_version "12.3"
sg_icon_stat "65,65,-1,-1,blue,white,0,07734,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 65 65 0 ],[1 1 1 ]"
");\nplot([0 65 65 0 0 ],[0 0 65 65 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[41.99 41."
"99 50.99 41.99 50.99 50.99 50.99 41.99 ],[0.839 0.874 0.937 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[32.9"
"9 32.99 41.99 41.99 32.99 ],[0.77 0.82 0.91 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[23.99 23.99 32.99 32"
".99 23.99 ],[0.839 0.874 0.937 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[14.99 14.99 23.99 14."
"99 23.99 23.99 14.99 ],[0.77 0.82 0.91 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType SubSystem
Name "USER_LOGIC"
SID 1985
Ports []
Position [165, 119, 265, 161]
LibraryVersion "1.216"
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "USER_LOGIC"
Location [2, 73, 1900, 1146]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A3"
PaperUnits "centimeters"
TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "125"
Block {
BlockType Reference
Name " System Generator"
SID 1988
Tag "genX"
Ports []
Position [12, 17, 62, 67]
ShowName off
AttributesFormatString "System\\nGenerator"
LibraryVersion "1.2"
UserDataPersistent on
UserData "DataTag2"
SourceBlock "xbsIndex_r4/ System Generator"
SourceType "Xilinx System Generator Block"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
infoedit " System Generator"
xilinxfamily "virtex6"
part "xc6vlx240t"
speed "-3"
package "ff784"
synthesis_tool "XST"
clock_wrapper "Clock Enables"
directory "C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_1_PCIe_UserLogic_00_US"
"ER_LOGIC"
testbench off
simulink_period "USER_TS"
sysclk_period "USER_CLK"
dcm_input_clock_period "5"
incr_netlist off
trim_vbits "Everywhere in SubSystem"
dbl_ovrd "According to Block Masks"
core_generation "According to Block Masks"
run_coregen off
deprecated_control off
eval_field "0"
has_advanced_control "0"
sggui_pos "198,253,464,470"
block_type "sysgen"
block_version "12.3"
sg_icon_stat "50,50,0,0,token,white,0,58c5b5770fe5f7c311f53dbc6e73f0f6,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);\npat"
"ch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 "
"],[0.933333 0.203922 0.141176 ]);\npatch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 "
"],[0.698039 0.0313725 0.219608 ]);\npatch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 "
"],[0.933333 0.203922 0.141176 ]);\npatch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.15"
"5 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','CO"
"MMENT: begin icon text');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "BRAM_rd_addr"
SID 1989
Ports [1, 1]
Position [550, 2795, 610, 2815]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "BRAM_rd_dout"
SID 1990
Ports [1, 1]
Position [650, 2795, 715, 2815]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "BRAM_wr_addr"
SID 1991
Ports [1, 1]
Position [860, 2750, 920, 2770]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "BRAM_wr_din"
SID 1992
Ports [1, 1]
Position [860, 2795, 920, 2815]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "BRAM_wr_en"
SID 1993
Ports [1, 1]
Position [860, 2840, 920, 2860]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "Constant1"
SID 3370
Ports [0, 1]
Position [670, 1673, 695, 1697]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant10"
SID 3366
Ports [0, 1]
Position [455, 2198, 480, 2222]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant11"
SID 3367
Ports [0, 1]
Position [455, 2263, 480, 2287]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant12"
SID 2921
Ports [0, 1]
Position [670, 1538, 695, 1562]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant14"
SID 3360
Ports [0, 1]
Position [610, 3027, 665, 3053]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "1"
n_bits "8"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "55,26,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
"3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
" 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
" 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
"_label('output',1,'1');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant15"
SID 3143
Ports [0, 1]
Position [370, 2982, 425, 3008]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "1"
n_bits "8"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "55,26,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
"3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
" 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
" 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
"_label('output',1,'1');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant19"
SID 3310
Ports [0, 1]
Position [670, 1018, 695, 1042]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant2"
SID 1997
Ports [0, 1]
Position [240, 2837, 295, 2863]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Unsigned"
const "255"
n_bits "8"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "55,26,0,1,white,blue,0,13fa6234,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
"3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
" 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
" 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
"_label('output',1,'255');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant20"
SID 3361
Ports [0, 1]
Position [670, 483, 695, 507]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant21"
SID 3323
Ports [0, 1]
Position [670, 1148, 695, 1172]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant22"
SID 3334
Ports [0, 1]
Position [670, 1278, 695, 1302]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant23"
SID 3345
Ports [0, 1]
Position [670, 1408, 695, 1432]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant24"
SID 3362
Ports [0, 1]
Position [670, 373, 695, 397]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant25"
SID 3363
Ports [0, 1]
Position [670, 243, 695, 267]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant26"
SID 3364
Ports [0, 1]
Position [670, 133, 695, 157]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant3"
SID 3373
Ports [0, 1]
Position [670, 1793, 695, 1817]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant4"
SID 2925
Ports [0, 1]
Position [670, 743, 695, 767]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant6"
SID 2438
Ports [0, 1]
Position [935, 92, 990, 118]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "1"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "55,26,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3"
"3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16"
".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1"
" 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946"
" 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port"
"_label('output',1,'1');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant7"
SID 2887
Ports [0, 1]
Position [670, 618, 695, 642]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant8"
SID 3365
Ports [0, 1]
Position [455, 2133, 480, 2157]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Constant9"
SID 2888
Ports [0, 1]
Position [670, 878, 695, 902]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Constant"
SourceType "Xilinx Constant Block Block"
arith_type "Boolean"
const "0"
n_bits "32"
bin_pt "0"
explicit_period on
period "USER_TS"
dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
equ "P=C"
opselect "C"
inp2 "PCIN>>17"
opr "+"
inp1 "P"
carry "CIN"
dbl_ovrd off
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "constant"
block_version "12.3"
sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18"
".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3"
"3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch(["
"8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''"
",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0')"
";\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert1"
SID 2657
Ports [1, 1]
Position [500, 150, 545, 180]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert11"
SID 2864
Ports [1, 1]
Position [500, 760, 545, 790]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert12"
SID 2874
Ports [1, 1]
Position [500, 895, 545, 925]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert14"
SID 3311
Ports [1, 1]
Position [500, 1035, 545, 1065]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert15"
SID 3324
Ports [1, 1]
Position [500, 1165, 545, 1195]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert16"
SID 3335
Ports [1, 1]
Position [500, 1295, 545, 1325]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert17"
SID 3346
Ports [1, 1]
Position [500, 1425, 545, 1455]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert3"
SID 3368
Ports [1, 1]
Position [500, 1690, 545, 1720]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "TimeCountReset"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "Convert4"
SID 2854
Ports [1, 1]
Position [500, 635, 545, 665]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert5"
SID 2439
Ports [1, 1]
Position [500, 260, 545, 290]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert6"
SID 2440
Ports [1, 1]
Position [500, 390, 545, 420]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert7"
SID 2441
Ports [1, 1]
Position [500, 500, 545, 530]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert8"
SID 2615
Ports [1, 1]
Position [500, 1555, 545, 1585]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Convert9"
SID 3369
Ports [1, 1]
Position [500, 1810, 545, 1840]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Convert"
SourceType "Xilinx Type Converter Block"
infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
arith_type "Boolean"
n_bits "16"
bin_pt "14"
quantization "Truncate"
overflow "Wrap"
en off
latency "0"
dbl_ovrd off
pipeline off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "convert"
block_version "12.3"
sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23.4"
"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
"[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([17."
"1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cas"
"t');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "TimeCountTrigger"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "Counter4"
SID 2004
Ports [0, 1]
Position [235, 2730, 295, 2790]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Counter"
SourceType "Xilinx Counter Block"
infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is"
" implemented by combining a counter with a comparator."
cnt_type "Free Running"
cnt_to "Inf"
operation "Up"
start_count "0"
cnt_by_val "1"
arith_type "Unsigned"
n_bits "12"
bin_pt "0"
load_pin off
rst off
en off
explicit_period "on"
period "USER_TS"
dbl_ovrd off
use_behavioral_HDL off
implementation "Fabric"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "counter"
block_version "12.3"
sg_icon_stat "60,60,0,1,white,blue,0,7ac47ef5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8"
"8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ],"
"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20."
"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf("
"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');disp('{\\fontsize{14}\\"
"bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "FIFO_rd_count"
SID 2007
Ports [1, 1]
Position [350, 3215, 415, 3235]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "15"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "FIFO_rd_dout"
SID 2008
Ports [1, 1]
Position [245, 3125, 310, 3145]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "72"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "FIFO_rd_empty"
SID 2009
Ports [1, 1]
Position [245, 3020, 310, 3040]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "12"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "FIFO_rd_en"
SID 2010
Ports [1, 1]
Position [800, 3020, 860, 3040]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "FIFO_rd_pempty"
SID 2011
Ports [1, 1]
Position [245, 3185, 310, 3205]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "FIFO_rd_valid"
SID 3085
Ports [1, 1]
Position [245, 3075, 310, 3095]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "14"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "FIFO_wr_count"
SID 3083
Ports [1, 1]
Position [245, 3305, 310, 3325]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Unsigned"
n_bits "15"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "FIFO_wr_din"
SID 2012
Ports [1, 1]
Position [800, 3125, 860, 3145]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "FIFO_wr_en"
SID 2013
Ports [1, 1]
Position [800, 3075, 860, 3095]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "FIFO_wr_full"
SID 2014
Ports [1, 1]
Position [245, 3245, 310, 3265]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "8"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "FIFO_wr_pfull"
SID 2015
Ports [1, 1]
Position [350, 3275, 415, 3295]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "64"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "From Register"
SID 3378
Ports [0, 1]
Position [270, 2184, 325, 2206]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'debug1i'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register1"
SID 3379
Ports [0, 1]
Position [270, 2129, 325, 2151]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'debug2i'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register10"
SID 2443
Ports [0, 1]
Position [335, 264, 390, 286]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register04tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register11"
SID 2444
Ports [0, 1]
Position [250, 354, 305, 376]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register05td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register12"
SID 2445
Ports [0, 1]
Position [340, 394, 395, 416]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register05tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register13"
SID 2446
Ports [0, 1]
Position [250, 464, 305, 486]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register06td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register14"
SID 2447
Ports [0, 1]
Position [340, 504, 395, 526]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register06tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register15"
SID 2472
Ports [0, 1]
Position [270, 2339, 325, 2361]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'DMA_Host2Board_Done'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register16"
SID 2473
Ports [0, 1]
Position [270, 2394, 325, 2416]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'DMA_Host2Board_Busy'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register17"
SID 2616
Ports [0, 1]
Position [245, 1519, 300, 1541]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register07td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register18"
SID 2617
Ports [0, 1]
Position [340, 1559, 395, 1581]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register07tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register19"
SID 3380
Ports [0, 1]
Position [270, 2289, 325, 2311]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'debug4i'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register2"
SID 3381
Ports [0, 1]
Position [270, 2239, 325, 2261]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'debug3i'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register20"
SID 2855
Ports [0, 1]
Position [250, 599, 305, 621]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register08td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register21"
SID 2856
Ports [0, 1]
Position [340, 639, 395, 661]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register08tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register22"
SID 2865
Ports [0, 1]
Position [250, 724, 305, 746]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register09td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register23"
SID 2866
Ports [0, 1]
Position [340, 764, 395, 786]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register09tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register24"
SID 2875
Ports [0, 1]
Position [250, 859, 305, 881]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register10td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register25"
SID 2876
Ports [0, 1]
Position [340, 899, 395, 921]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register10tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register26"
SID 3312
Ports [0, 1]
Position [250, 999, 305, 1021]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register11td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register27"
SID 3313
Ports [0, 1]
Position [340, 1039, 395, 1061]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register11tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register28"
SID 3325
Ports [0, 1]
Position [250, 1129, 305, 1151]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register12td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register29"
SID 3326
Ports [0, 1]
Position [340, 1169, 395, 1191]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register12tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register3"
SID 2369
Ports [0, 1]
Position [235, 1654, 290, 1676]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register01td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register30"
SID 3336
Ports [0, 1]
Position [250, 1259, 305, 1281]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register13td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register31"
SID 3337
Ports [0, 1]
Position [340, 1299, 395, 1321]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register13tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register32"
SID 3347
Ports [0, 1]
Position [250, 1389, 305, 1411]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register14td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register33"
SID 3348
Ports [0, 1]
Position [340, 1429, 395, 1451]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register14tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register4"
SID 2370
Ports [0, 1]
Position [340, 1694, 395, 1716]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register01tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register5"
SID 2658
Ports [0, 1]
Position [250, 114, 305, 136]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register02td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register6"
SID 2659
Ports [0, 1]
Position [340, 154, 395, 176]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register02tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register7"
SID 2373
Ports [0, 1]
Position [235, 1774, 290, 1796]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register03td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register8"
SID 2374
Ports [0, 1]
Position [340, 1814, 395, 1836]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register03tv'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "1"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "From Register9"
SID 2442
Ports [0, 1]
Position [250, 224, 305, 246]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/From Register"
SourceType "Xilinx Shared Memory Based From Register Block"
infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
shared_memory_name "'register04td'"
init "0"
period "USER_TS"
ownership "Owned and initialized elsewhere"
arith_type "Unsigned"
n_bits "32"
bin_pt "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "fromreg"
block_version "12.3"
sg_icon_stat "55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3"
"3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14"
".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 "
"]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('output',1,'dout');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Inverter3"
SID 3082
Ports [1, 1]
Position [540, 2393, 580, 2417]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Inverter"
SourceType "Xilinx Inverter Block"
infoedit "Bitwise logical negation (one's complement) operator."
en off
latency "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "inv"
block_version "12.3"
sg_icon_stat "40,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 40 40 0 0 ],[0 0 24 24 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('"
"not');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Inverter5"
SID 3276
Ports [1, 1]
Position [510, 3018, 540, 3042]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Inverter"
SourceType "Xilinx Inverter Block"
infoedit "Bitwise logical negation (one's complement) operator."
en off
latency "0"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "inv"
block_version "12.3"
sg_icon_stat "30,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.33 "
"18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15.33"
" 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n"
"patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\n"
"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');"
"\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "Logical4"
SID 3274
Ports [2, 1]
Position [560, 2977, 595, 3048]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Logical"
SourceType "Xilinx Logical Block Block"
logical_function "AND"
inputs "2"
en off
latency "0"
precision "Full"
arith_type "Unsigned"
n_bits "16"
bin_pt "0"
align_bp on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "logical"
block_version "12.3"
sg_icon_stat "35,71,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 71 71 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 35 35 0 0 ],[0 0 71 71 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[40.55 40.55 45.55"
" 40.55 45.55 45.55 45.55 40.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[35.55 35.55 40.55 40.55 35.55 "
"],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[30.55 30.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch("
"[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[25.55 25.55 30.55 25.55 30.55 30.55 25.55 ],[0.931 0.946 0.973 ]);\nfpr"
"intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n"
"fprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "To Register"
SID 2398
Ports [2, 1]
Position [1210, 1676, 1270, 1709]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register01rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register1"
SID 2399
Ports [2, 1]
Position [1080, 1716, 1140, 1749]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register01rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register10"
SID 2452
Ports [2, 1]
Position [1105, 416, 1165, 449]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register05rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register11"
SID 2453
Ports [2, 1]
Position [1105, 526, 1165, 559]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register06rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register12"
SID 2621
Ports [2, 1]
Position [1110, 1581, 1170, 1614]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register07rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register13"
SID 2622
Ports [2, 1]
Position [1200, 1541, 1260, 1574]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register07rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register14"
SID 2859
Ports [2, 1]
Position [1105, 661, 1165, 694]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register08rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register15"
SID 2860
Ports [2, 1]
Position [1185, 621, 1245, 654]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register08rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register16"
SID 2869
Ports [2, 1]
Position [1105, 786, 1165, 819]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register09rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register17"
SID 2870
Ports [2, 1]
Position [1185, 746, 1245, 779]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register09rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register18"
SID 2879
Ports [2, 1]
Position [1105, 921, 1165, 954]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register10rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register19"
SID 2880
Ports [2, 1]
Position [1185, 881, 1245, 914]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register10rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register2"
SID 2660
Ports [2, 1]
Position [1185, 136, 1245, 169]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register02rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register20"
SID 3316
Ports [2, 1]
Position [1105, 1061, 1165, 1094]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register11rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register21"
SID 3317
Ports [2, 1]
Position [1185, 1021, 1245, 1054]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register11rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register22"
SID 3328
Ports [2, 1]
Position [1105, 1191, 1165, 1224]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register12rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register23"
SID 3329
Ports [2, 1]
Position [1185, 1151, 1245, 1184]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register12rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register24"
SID 3339
Ports [2, 1]
Position [1105, 1321, 1165, 1354]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register13rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register25"
SID 3340
Ports [2, 1]
Position [1185, 1281, 1245, 1314]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register13rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register26"
SID 3350
Ports [2, 1]
Position [1105, 1451, 1165, 1484]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register14rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register27"
SID 3351
Ports [2, 1]
Position [1185, 1411, 1245, 1444]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register14rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register3"
SID 2401
Ports [2, 1]
Position [1210, 1796, 1270, 1829]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register03rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register4"
SID 2661
Ports [2, 1]
Position [1100, 176, 1160, 209]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register02rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register5"
SID 2403
Ports [2, 1]
Position [1080, 1836, 1140, 1869]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register03rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register6"
SID 2448
Ports [2, 1]
Position [1185, 246, 1245, 279]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register04rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register7"
SID 2449
Ports [2, 1]
Position [1105, 286, 1165, 319]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register04rv'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register8"
SID 2450
Ports [2, 1]
Position [1185, 376, 1245, 409]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register05rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "To Register9"
SID 2451
Ports [2, 1]
Position [1185, 486, 1245, 519]
AttributesFormatString "<< %<shared_memory_name> >>"
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/To Register"
SourceType "Xilinx Shared Memory Based To Register Block"
infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
shared_memory_name "'register06rd'"
init "0"
ownership "Locally owned and initialized"
explicit_data_type off
arith_type "Signed (2's comp)"
n_bits "16"
bin_pt "14"
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "toreg"
block_version "12.3"
sg_icon_stat "60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 60 60 0 0 ],[0 0 33 33 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[20.44 20.44 24.4"
"4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[16.44 16.44 20.44 20.44 16.44 ],"
"[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([25."
"1 38.88 34.88 30.88 26.88 21.1 25.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: e"
"nd icon text');"
}
Block {
BlockType Reference
Name "rst_i"
SID 2034
Ports [1, 1]
Position [440, 2395, 505, 2415]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway In"
SourceType "Xilinx Gateway In Block"
infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p"
"oint or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input ports."
arith_type "Boolean"
n_bits "1"
bin_pt "0"
quantization "Round (unbiased: +/- Inf)"
overflow "Saturate"
period "USER_TS"
dbl_ovrd off
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
hdl_port "on"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayin"
block_version "12.3"
sg_icon_stat "65,20,1,1,white,yellow,0,00d3666e,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
"on text');"
}
Block {
BlockType Reference
Name "rst_o"
SID 2035
Ports [1, 1]
Position [700, 2395, 760, 2415]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "tx_en_in1"
SID 3371
Ports [1, 1]
Position [730, 1713, 775, 1737]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in10"
SID 3375
Ports [3, 1]
Position [730, 1778, 775, 1832]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "reg03"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in100"
SID 2918
Ports [1, 1]
Position [730, 918, 775, 942]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in104"
SID 3084
Ports [1, 1]
Position [555, 3303, 600, 3327]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in105"
SID 3376
Ports [1, 1]
Position [370, 3018, 415, 3042]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in107"
SID 3377
Ports [1, 1]
Position [435, 3018, 480, 3042]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in108"
SID 3092
Ports [2, 1]
Position [715, 3004, 755, 3051]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "40,47,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 40 40 0 0 ],[0 0 47 47 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[28.55 28.55 33.55"
" 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[23.55 23.55 28.55 28.55 23.55 "
"],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1 1 ]);\npatch("
"[13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.946 0.973 ]);\nfpr"
"intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',"
"1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');dis"
"p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in109"
SID 3093
Ports [1, 1]
Position [710, 3073, 755, 3097]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in113"
SID 3318
Ports [1, 1]
Position [730, 1058, 775, 1082]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in114"
SID 3330
Ports [1, 1]
Position [730, 1188, 775, 1212]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in115"
SID 3320
Ports [3, 1]
Position [730, 1003, 775, 1057]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "200000 - 29"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "Thread2_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in116"
SID 3321
Ports [1, 1]
Position [435, 1038, 480, 1062]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in117"
SID 3322
Ports [1, 1]
Position [435, 998, 480, 1022]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in118"
SID 3331
Ports [3, 1]
Position [730, 1133, 775, 1187]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "19136"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "Thread2_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in119"
SID 3332
Ports [1, 1]
Position [435, 1168, 480, 1192]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in12"
SID 2407
Ports [1, 1]
Position [435, 1773, 480, 1797]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in120"
SID 3333
Ports [1, 1]
Position [435, 1128, 480, 1152]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in121"
SID 3341
Ports [1, 1]
Position [730, 1318, 775, 1342]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in122"
SID 3342
Ports [3, 1]
Position [730, 1263, 775, 1317]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "Thread2_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in123"
SID 3343
Ports [1, 1]
Position [435, 1298, 480, 1322]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in124"
SID 3344
Ports [1, 1]
Position [435, 1258, 480, 1282]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in125"
SID 3352
Ports [1, 1]
Position [730, 1448, 775, 1472]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in126"
SID 3353
Ports [3, 1]
Position [730, 1393, 775, 1447]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "Thread2_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in127"
SID 3354
Ports [1, 1]
Position [435, 1428, 480, 1452]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in128"
SID 3355
Ports [1, 1]
Position [435, 1388, 480, 1412]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in13"
SID 2693
Ports [1, 1]
Position [730, 1578, 775, 1602]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in15"
SID 3062
Ports [1, 1]
Position [395, 2793, 440, 2817]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in16"
SID 3063
Ports [1, 1]
Position [600, 2748, 645, 2772]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in17"
SID 2044
Ports [1, 1]
Position [395, 2748, 440, 2772]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in18"
SID 3064
Ports [1, 1]
Position [395, 2838, 440, 2862]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in19"
SID 3065
Ports [1, 1]
Position [775, 2748, 820, 2772]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in2"
SID 3372
Ports [3, 1]
Position [730, 1658, 775, 1712]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "reg01"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in20"
SID 3066
Ports [1, 1]
Position [775, 2793, 820, 2817]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in26"
SID 2054
Ports [1, 1]
Position [610, 2393, 655, 2417]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "rst"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in3"
SID 2627
Ports [1, 1]
Position [530, 2133, 575, 2157]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in30"
SID 2059
Ports [1, 1]
Position [520, 2748, 565, 2772]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in33"
SID 2666
Ports [3, 1]
Position [730, 118, 775, 172]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "ChunkDMAinProgress"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in38"
SID 2237
Ports [1, 1]
Position [710, 3123, 755, 3147]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in39"
SID 2238
Ports [1, 1]
Position [555, 3183, 600, 3207]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in4"
SID 2419
Ports [1, 1]
Position [435, 1693, 480, 1717]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in40"
SID 2239
Ports [1, 1]
Position [555, 3213, 600, 3237]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in41"
SID 2240
Ports [1, 1]
Position [555, 3243, 600, 3267]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in42"
SID 2241
Ports [1, 1]
Position [555, 3273, 600, 3297]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in43"
SID 3067
Ports [1, 1]
Position [775, 2838, 820, 2862]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in5"
SID 2664
Ports [1, 1]
Position [435, 153, 480, 177]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in50"
SID 2454
Ports [3, 1]
Position [730, 228, 775, 282]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "Thread1_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in51"
SID 2775
Ports [1, 1]
Position [530, 2263, 575, 2287]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in52"
SID 2455
Ports [1, 1]
Position [435, 463, 480, 487]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in53"
SID 2466
Ports [3, 1]
Position [730, 358, 775, 412]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "Thread2_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in54"
SID 2467
Ports [3, 1]
Position [730, 468, 775, 522]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "NewBurst_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in58"
SID 2461
Ports [1, 1]
Position [435, 263, 480, 287]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in59"
SID 2462
Ports [1, 1]
Position [435, 393, 480, 417]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in6"
SID 2665
Ports [1, 1]
Position [435, 113, 480, 137]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in60"
SID 2463
Ports [1, 1]
Position [435, 353, 480, 377]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in61"
SID 2464
Ports [1, 1]
Position [435, 503, 480, 527]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in62"
SID 2465
Ports [1, 1]
Position [435, 223, 480, 247]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "dinb"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in65"
SID 2623
Ports [1, 1]
Position [435, 1518, 480, 1542]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in66"
SID 2624
Ports [3, 1]
Position [730, 1523, 775, 1577]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "ResetIRQ_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in67"
SID 2625
Ports [1, 1]
Position [435, 1558, 480, 1582]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in7"
SID 3374
Ports [1, 1]
Position [730, 1833, 775, 1857]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in75"
SID 2653
Ports [1, 1]
Position [530, 2198, 575, 2222]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in8"
SID 2431
Ports [1, 1]
Position [435, 1813, 480, 1837]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in85"
SID 2861
Ports [3, 1]
Position [730, 603, 775, 657]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "1"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "Thread2_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in86"
SID 2862
Ports [1, 1]
Position [435, 638, 480, 662]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in87"
SID 2863
Ports [1, 1]
Position [435, 598, 480, 622]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in88"
SID 2871
Ports [3, 1]
Position [730, 728, 775, 782]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "hex2dec('80000000')"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "Thread2_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in89"
SID 2872
Ports [1, 1]
Position [435, 763, 480, 787]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in9"
SID 2432
Ports [1, 1]
Position [435, 1653, 480, 1677]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "dinb"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in90"
SID 2873
Ports [1, 1]
Position [435, 723, 480, 747]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in91"
SID 2881
Ports [3, 1]
Position [730, 863, 775, 917]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "hex2dec('00000000')"
rst on
en on
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 33.66 39."
"66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 33.66 27.66"
" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1 1 ]);\npatch("
"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0.946 0.973 ]);\nfp"
"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'"
",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
Port {
PortNumber 1
Name "Thread2_reg"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "tx_en_in92"
SID 2882
Ports [1, 1]
Position [435, 898, 480, 922]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in93"
SID 2883
Ports [1, 1]
Position [435, 858, 480, 882]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in94"
SID 2912
Ports [1, 1]
Position [730, 173, 775, 197]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in95"
SID 2913
Ports [1, 1]
Position [730, 283, 775, 307]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in96"
SID 2914
Ports [1, 1]
Position [730, 413, 775, 437]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in97"
SID 2915
Ports [1, 1]
Position [730, 523, 775, 547]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in98"
SID 2916
Ports [1, 1]
Position [730, 658, 775, 682]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "tx_en_in99"
SID 2917
Ports [1, 1]
Position [730, 783, 775, 807]
ShowName off
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Register"
SourceType "Xilinx Register Block"
init "0"
rst off
en off
dbl_ovrd off
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "20,20,348,193"
block_type "register"
block_version "10.1.3"
sg_icon_stat "45,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
" ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3"
"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15"
".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
"]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label"
"('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
"f('','COMMENT: end icon text');"
}
Block {
BlockType Reference
Name "user_int_1o"
SID 2628
Ports [1, 1]
Position [610, 2135, 670, 2155]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "user_int_2o"
SID 2656
Ports [1, 1]
Position [610, 2200, 670, 2220]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Block {
BlockType Reference
Name "user_int_3o"
SID 2777
Ports [1, 1]
Position [610, 2265, 670, 2285]
LibraryVersion "1.2"
SourceBlock "xbsIndex_r4/Gateway Out"
SourceType "Xilinx Gateway Out Block"
infoedit "Gateway out block. Converts Xilinx fixed point or floating-point type inputs into ouputs of type Simu"
"link integer, double, or fixed point.<br><br>Hardware notes: In hardware these blocks become top level output port"
"s or are discarded, depending on how they are configured."
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
xl_use_area off
xl_area "[0,0,0,0,0,0,0]"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "gatewayout"
block_version "12.3"
sg_icon_stat "60,20,1,1,white,yellow,0,cc31b7ac,right,,[ ],[ ]"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
"con text');"
}
Line {
SrcBlock "rst_i"
SrcPort 1
DstBlock "Inverter3"
DstPort 1
}
Line {
Name "rst"
Labels [0, 0]
SrcBlock "tx_en_in26"
SrcPort 1
DstBlock "rst_o"
DstPort 1
}
Line {
SrcBlock "Constant2"
SrcPort 1
DstBlock "tx_en_in18"
DstPort 1
}
Line {
SrcBlock "BRAM_rd_dout"
SrcPort 1
DstBlock "tx_en_in20"
DstPort 1
}
Line {
SrcBlock "Counter4"
SrcPort 1
Points [50, 0]
Branch {
DstBlock "tx_en_in17"
DstPort 1
}
Branch {
Points [0, 45]
DstBlock "tx_en_in15"
DstPort 1
}
}
Line {
SrcBlock "tx_en_in17"
SrcPort 1
DstBlock "tx_en_in30"
DstPort 1
}
Line {
SrcBlock "tx_en_in30"
SrcPort 1
DstBlock "tx_en_in16"
DstPort 1
}
Line {
SrcBlock "tx_en_in38"
SrcPort 1
DstBlock "FIFO_wr_din"
DstPort 1
}
Line {
SrcBlock "From Register3"
SrcPort 1
DstBlock "tx_en_in9"
DstPort 1
}
Line {
SrcBlock "From Register4"
SrcPort 1
DstBlock "tx_en_in4"
DstPort 1
}
Line {
SrcBlock "From Register7"
SrcPort 1
DstBlock "tx_en_in12"
DstPort 1
}
Line {
SrcBlock "From Register8"
SrcPort 1
DstBlock "tx_en_in8"
DstPort 1
}
Line {
SrcBlock "tx_en_in4"
SrcPort 1
DstBlock "Convert3"
DstPort 1
}
Line {
SrcBlock "tx_en_in8"
SrcPort 1
DstBlock "Convert9"
DstPort 1
}
Line {
Name "reg01"
Labels [0, 0]
SrcBlock "tx_en_in2"
SrcPort 1
DstBlock "To Register"
DstPort 1
}
Line {
SrcBlock "tx_en_in1"
SrcPort 1
DstBlock "To Register1"
DstPort 1
}
Line {
Name "reg03"
Labels [0, 0]
SrcBlock "tx_en_in10"
SrcPort 1
DstBlock "To Register3"
DstPort 1
}
Line {
SrcBlock "tx_en_in7"
SrcPort 1
DstBlock "To Register5"
DstPort 1
}
Line {
SrcBlock "From Register9"
SrcPort 1
DstBlock "tx_en_in62"
DstPort 1
}
Line {
SrcBlock "From Register10"
SrcPort 1
DstBlock "tx_en_in58"
DstPort 1
}
Line {
SrcBlock "From Register11"
SrcPort 1
DstBlock "tx_en_in60"
DstPort 1
}
Line {
SrcBlock "From Register12"
SrcPort 1
DstBlock "tx_en_in59"
DstPort 1
}
Line {
SrcBlock "From Register13"
SrcPort 1
DstBlock "tx_en_in52"
DstPort 1
}
Line {
SrcBlock "From Register14"
SrcPort 1
DstBlock "tx_en_in61"
DstPort 1
}
Line {
Name "dinb"
Labels [0, 0]
SrcBlock "tx_en_in62"
SrcPort 1
DstBlock "tx_en_in50"
DstPort 1
}
Line {
SrcBlock "tx_en_in58"
SrcPort 1
DstBlock "Convert5"
DstPort 1
}
Line {
SrcBlock "tx_en_in60"
SrcPort 1
DstBlock "tx_en_in53"
DstPort 1
}
Line {
SrcBlock "tx_en_in59"
SrcPort 1
DstBlock "Convert6"
DstPort 1
}
Line {
SrcBlock "tx_en_in52"
SrcPort 1
DstBlock "tx_en_in54"
DstPort 1
}
Line {
SrcBlock "tx_en_in61"
SrcPort 1
DstBlock "Convert7"
DstPort 1
}
Line {
Name "Thread1_reg"
Labels [0, 1]
SrcBlock "tx_en_in50"
SrcPort 1
DstBlock "To Register6"
DstPort 1
}
Line {
Name "Thread2_reg"
Labels [1, 0]
SrcBlock "tx_en_in53"
SrcPort 1
DstBlock "To Register8"
DstPort 1
}
Line {
Name "NewBurst_reg"
Labels [1, 0]
SrcBlock "tx_en_in54"
SrcPort 1
DstBlock "To Register9"
DstPort 1
}
Line {
SrcBlock "Constant6"
SrcPort 1
Points [40, 0; 0, 55]
Branch {
Points [0, 40]
Branch {
Points [0, 70]
Branch {
DstBlock "To Register6"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
Points [0, 90]
Branch {
DstBlock "To Register8"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
Points [0, 70]
Branch {
DstBlock "To Register9"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register11"
DstPort 2
}
Branch {
Points [0, 95]
Branch {
DstBlock "To Register15"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register14"
DstPort 2
}
Branch {
Points [0, 85]
Branch {
DstBlock "To Register17"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register16"
DstPort 2
}
Branch {
Points [0, 95]
Branch {
DstBlock "To Register19"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register18"
DstPort 2
}
Branch {
Points [0, 100]
Branch {
DstBlock "To Register21"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register20"
DstPort 2
}
Branch {
Points [0, 90]
Branch {
DstBlock "To Register23"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register22"
DstPort 2
}
Branch {
Points [0, 90]
Branch {
DstBlock "To Register25"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register24"
DstPort 2
}
Branch {
Points [0, 90]
Branch {
DstBlock "To Register27"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register26"
DstPort 2
}
Branch {
Points [0, 90]
Branch {
DstBlock "To Register13"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register12"
DstPort 2
}
Branch {
Points [0, 95]
Branch {
DstBlock "To Register"
DstPort 2
}
Branch {
Points [0, 40]
Branch {
DstBlock "To Register1"
DstPort 2
}
Branch {
Points [0, 80]
Branch {
DstBlock "To Register3"
DstPort 2
}
Branch {
Points [0, 40]
DstBlock "To Register5"
DstPort 2
}
}
}
}
}
}
}
}
}
}
}
}
}
}
}
}
}
}
}
}
}
}
Branch {
DstBlock "To Register10"
DstPort 2
}
}
}
Branch {
DstBlock "To Register7"
DstPort 2
}
}
}
Branch {
DstBlock "To Register4"
DstPort 2
}
}
Branch {
DstBlock "To Register2"
DstPort 2
}
}
Line {
SrcBlock "Convert5"
SrcPort 1
Points [145, 0]
Branch {
DstBlock "tx_en_in50"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in95"
DstPort 1
}
}
Line {
SrcBlock "Convert6"
SrcPort 1
Points [155, 0]
Branch {
DstBlock "tx_en_in53"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in96"
DstPort 1
}
}
Line {
SrcBlock "Convert7"
SrcPort 1
Points [155, 0]
Branch {
DstBlock "tx_en_in54"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in97"
DstPort 1
}
}
Line {
SrcBlock "From Register15"
SrcPort 1
Points [40, 0]
}
Line {
SrcBlock "From Register16"
SrcPort 1
Points [0, 5; 40, 0]
}
Line {
SrcBlock "Constant20"
SrcPort 1
DstBlock "tx_en_in54"
DstPort 2
}
Line {
SrcBlock "Constant25"
SrcPort 1
DstBlock "tx_en_in50"
DstPort 2
}
Line {
SrcBlock "Constant24"
SrcPort 1
DstBlock "tx_en_in53"
DstPort 2
}
Line {
SrcBlock "From Register17"
SrcPort 1
DstBlock "tx_en_in65"
DstPort 1
}
Line {
SrcBlock "From Register18"
SrcPort 1
DstBlock "tx_en_in67"
DstPort 1
}
Line {
SrcBlock "tx_en_in65"
SrcPort 1
DstBlock "tx_en_in66"
DstPort 1
}
Line {
SrcBlock "tx_en_in67"
SrcPort 1
DstBlock "Convert8"
DstPort 1
}
Line {
SrcBlock "Convert8"
SrcPort 1
Points [155, 0]
Branch {
DstBlock "tx_en_in66"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in13"
DstPort 1
}
}
Line {
SrcBlock "tx_en_in3"
SrcPort 1
DstBlock "user_int_1o"
DstPort 1
}
Line {
SrcBlock "tx_en_in75"
SrcPort 1
DstBlock "user_int_2o"
DstPort 1
}
Line {
SrcBlock "From Register5"
SrcPort 1
DstBlock "tx_en_in6"
DstPort 1
}
Line {
SrcBlock "From Register6"
SrcPort 1
DstBlock "tx_en_in5"
DstPort 1
}
Line {
SrcBlock "tx_en_in6"
SrcPort 1
DstBlock "tx_en_in33"
DstPort 1
}
Line {
SrcBlock "tx_en_in5"
SrcPort 1
DstBlock "Convert1"
DstPort 1
}
Line {
SrcBlock "Convert1"
SrcPort 1
Points [140, 0]
Branch {
DstBlock "tx_en_in33"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in94"
DstPort 1
}
}
Line {
SrcBlock "Constant26"
SrcPort 1
DstBlock "tx_en_in33"
DstPort 2
}
Line {
Name "ChunkDMAinProgress"
Labels [0, 1]
SrcBlock "tx_en_in33"
SrcPort 1
DstBlock "To Register2"
DstPort 1
}
Line {
Name "ResetIRQ_reg"
Labels [0, 0]
SrcBlock "tx_en_in66"
SrcPort 1
DstBlock "To Register13"
DstPort 1
}
Line {
SrcBlock "tx_en_in51"
SrcPort 1
DstBlock "user_int_3o"
DstPort 1
}
Line {
SrcBlock "From Register20"
SrcPort 1
DstBlock "tx_en_in87"
DstPort 1
}
Line {
SrcBlock "From Register21"
SrcPort 1
DstBlock "tx_en_in86"
DstPort 1
}
Line {
SrcBlock "tx_en_in87"
SrcPort 1
DstBlock "tx_en_in85"
DstPort 1
}
Line {
SrcBlock "tx_en_in86"
SrcPort 1
DstBlock "Convert4"
DstPort 1
}
Line {
Name "Thread2_reg"
Labels [1, 0]
SrcBlock "tx_en_in85"
SrcPort 1
DstBlock "To Register15"
DstPort 1
}
Line {
SrcBlock "Convert4"
SrcPort 1
Points [155, 0]
Branch {
DstBlock "tx_en_in85"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in98"
DstPort 1
}
}
Line {
SrcBlock "Constant7"
SrcPort 1
DstBlock "tx_en_in85"
DstPort 2
}
Line {
SrcBlock "From Register22"
SrcPort 1
DstBlock "tx_en_in90"
DstPort 1
}
Line {
SrcBlock "From Register23"
SrcPort 1
DstBlock "tx_en_in89"
DstPort 1
}
Line {
SrcBlock "tx_en_in90"
SrcPort 1
DstBlock "tx_en_in88"
DstPort 1
}
Line {
SrcBlock "tx_en_in89"
SrcPort 1
DstBlock "Convert11"
DstPort 1
}
Line {
Name "Thread2_reg"
Labels [1, 0]
SrcBlock "tx_en_in88"
SrcPort 1
DstBlock "To Register17"
DstPort 1
}
Line {
SrcBlock "Convert11"
SrcPort 1
Points [155, 0]
Branch {
DstBlock "tx_en_in88"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in99"
DstPort 1
}
}
Line {
SrcBlock "Constant4"
SrcPort 1
DstBlock "tx_en_in88"
DstPort 2
}
Line {
SrcBlock "From Register24"
SrcPort 1
DstBlock "tx_en_in93"
DstPort 1
}
Line {
SrcBlock "From Register25"
SrcPort 1
DstBlock "tx_en_in92"
DstPort 1
}
Line {
SrcBlock "tx_en_in93"
SrcPort 1
DstBlock "tx_en_in91"
DstPort 1
}
Line {
SrcBlock "tx_en_in92"
SrcPort 1
DstBlock "Convert12"
DstPort 1
}
Line {
Name "Thread2_reg"
Labels [1, 0]
SrcBlock "tx_en_in91"
SrcPort 1
DstBlock "To Register19"
DstPort 1
}
Line {
SrcBlock "Convert12"
SrcPort 1
Points [155, 0]
Branch {
DstBlock "tx_en_in91"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in100"
DstPort 1
}
}
Line {
SrcBlock "Constant9"
SrcPort 1
DstBlock "tx_en_in91"
DstPort 2
}
Line {
SrcBlock "tx_en_in94"
SrcPort 1
DstBlock "To Register4"
DstPort 1
}
Line {
SrcBlock "tx_en_in95"
SrcPort 1
DstBlock "To Register7"
DstPort 1
}
Line {
SrcBlock "tx_en_in96"
SrcPort 1
DstBlock "To Register10"
DstPort 1
}
Line {
SrcBlock "tx_en_in97"
SrcPort 1
DstBlock "To Register11"
DstPort 1
}
Line {
SrcBlock "tx_en_in98"
SrcPort 1
DstBlock "To Register14"
DstPort 1
}
Line {
SrcBlock "tx_en_in99"
SrcPort 1
DstBlock "To Register16"
DstPort 1
}
Line {
SrcBlock "tx_en_in100"
SrcPort 1
DstBlock "To Register18"
DstPort 1
}
Line {
SrcBlock "Constant12"
SrcPort 1
DstBlock "tx_en_in66"
DstPort 2
}
Line {
SrcBlock "FIFO_rd_pempty"
SrcPort 1
DstBlock "tx_en_in39"
DstPort 1
}
Line {
SrcBlock "FIFO_rd_count"
SrcPort 1
DstBlock "tx_en_in40"
DstPort 1
}
Line {
SrcBlock "FIFO_wr_full"
SrcPort 1
DstBlock "tx_en_in41"
DstPort 1
}
Line {
SrcBlock "FIFO_wr_pfull"
SrcPort 1
DstBlock "tx_en_in42"
DstPort 1
}
Line {
SrcBlock "FIFO_rd_dout"
SrcPort 1
DstBlock "tx_en_in38"
DstPort 1
}
Line {
SrcBlock "tx_en_in15"
SrcPort 1
DstBlock "BRAM_rd_addr"
DstPort 1
}
Line {
SrcBlock "tx_en_in16"
SrcPort 1
DstBlock "tx_en_in19"
DstPort 1
}
Line {
SrcBlock "tx_en_in18"
SrcPort 1
DstBlock "tx_en_in43"
DstPort 1
}
Line {
SrcBlock "tx_en_in19"
SrcPort 1
DstBlock "BRAM_wr_addr"
DstPort 1
}
Line {
SrcBlock "tx_en_in20"
SrcPort 1
DstBlock "BRAM_wr_din"
DstPort 1
}
Line {
SrcBlock "tx_en_in43"
SrcPort 1
DstBlock "BRAM_wr_en"
DstPort 1
}
Line {
SrcBlock "Inverter3"
SrcPort 1
DstBlock "tx_en_in26"
DstPort 1
}
Line {
SrcBlock "FIFO_wr_count"
SrcPort 1
DstBlock "tx_en_in104"
DstPort 1
}
Line {
SrcBlock "FIFO_rd_valid"
SrcPort 1
DstBlock "tx_en_in109"
DstPort 1
}
Line {
SrcBlock "tx_en_in108"
SrcPort 1
DstBlock "FIFO_rd_en"
DstPort 1
}
Line {
SrcBlock "Constant15"
SrcPort 1
DstBlock "Logical4"
DstPort 1
}
Line {
SrcBlock "tx_en_in109"
SrcPort 1
DstBlock "FIFO_wr_en"
DstPort 1
}
Line {
SrcBlock "Logical4"
SrcPort 1
DstBlock "tx_en_in108"
DstPort 1
}
Line {
SrcBlock "FIFO_rd_empty"
SrcPort 1
DstBlock "tx_en_in105"
DstPort 1
}
Line {
SrcBlock "Inverter5"
SrcPort 1
DstBlock "Logical4"
DstPort 2
}
Line {
SrcBlock "From Register26"
SrcPort 1
DstBlock "tx_en_in117"
DstPort 1
}
Line {
SrcBlock "From Register27"
SrcPort 1
DstBlock "tx_en_in116"
DstPort 1
}
Line {
SrcBlock "tx_en_in117"
SrcPort 1
DstBlock "tx_en_in115"
DstPort 1
}
Line {
SrcBlock "tx_en_in116"
SrcPort 1
DstBlock "Convert14"
DstPort 1
}
Line {
Name "Thread2_reg"
Labels [1, 0]
SrcBlock "tx_en_in115"
SrcPort 1
DstBlock "To Register21"
DstPort 1
}
Line {
SrcBlock "Convert14"
SrcPort 1
Points [155, 0]
Branch {
DstBlock "tx_en_in115"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in113"
DstPort 1
}
}
Line {
SrcBlock "Constant19"
SrcPort 1
DstBlock "tx_en_in115"
DstPort 2
}
Line {
SrcBlock "tx_en_in113"
SrcPort 1
DstBlock "To Register20"
DstPort 1
}
Line {
SrcBlock "From Register28"
SrcPort 1
DstBlock "tx_en_in120"
DstPort 1
}
Line {
SrcBlock "From Register29"
SrcPort 1
DstBlock "tx_en_in119"
DstPort 1
}
Line {
SrcBlock "tx_en_in120"
SrcPort 1
DstBlock "tx_en_in118"
DstPort 1
}
Line {
SrcBlock "tx_en_in119"
SrcPort 1
DstBlock "Convert15"
DstPort 1
}
Line {
Name "Thread2_reg"
Labels [1, 0]
SrcBlock "tx_en_in118"
SrcPort 1
DstBlock "To Register23"
DstPort 1
}
Line {
SrcBlock "Convert15"
SrcPort 1
Points [155, 0]
Branch {
Points [0, 20]
DstBlock "tx_en_in114"
DstPort 1
}
Branch {
DstBlock "tx_en_in118"
DstPort 3
}
}
Line {
SrcBlock "Constant21"
SrcPort 1
DstBlock "tx_en_in118"
DstPort 2
}
Line {
SrcBlock "tx_en_in114"
SrcPort 1
DstBlock "To Register22"
DstPort 1
}
Line {
SrcBlock "From Register30"
SrcPort 1
DstBlock "tx_en_in124"
DstPort 1
}
Line {
SrcBlock "From Register31"
SrcPort 1
DstBlock "tx_en_in123"
DstPort 1
}
Line {
SrcBlock "tx_en_in124"
SrcPort 1
DstBlock "tx_en_in122"
DstPort 1
}
Line {
SrcBlock "tx_en_in123"
SrcPort 1
DstBlock "Convert16"
DstPort 1
}
Line {
Name "Thread2_reg"
Labels [1, 0]
SrcBlock "tx_en_in122"
SrcPort 1
DstBlock "To Register25"
DstPort 1
}
Line {
SrcBlock "Convert16"
SrcPort 1
Points [155, 0]
Branch {
DstBlock "tx_en_in122"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in121"
DstPort 1
}
}
Line {
SrcBlock "Constant22"
SrcPort 1
DstBlock "tx_en_in122"
DstPort 2
}
Line {
SrcBlock "tx_en_in121"
SrcPort 1
DstBlock "To Register24"
DstPort 1
}
Line {
SrcBlock "From Register32"
SrcPort 1
DstBlock "tx_en_in128"
DstPort 1
}
Line {
SrcBlock "From Register33"
SrcPort 1
DstBlock "tx_en_in127"
DstPort 1
}
Line {
SrcBlock "tx_en_in128"
SrcPort 1
DstBlock "tx_en_in126"
DstPort 1
}
Line {
SrcBlock "tx_en_in127"
SrcPort 1
DstBlock "Convert17"
DstPort 1
}
Line {
Name "Thread2_reg"
Labels [1, 0]
SrcBlock "tx_en_in126"
SrcPort 1
DstBlock "To Register27"
DstPort 1
}
Line {
SrcBlock "Convert17"
SrcPort 1
Points [155, 0]
Branch {
Points [0, 20]
DstBlock "tx_en_in125"
DstPort 1
}
Branch {
DstBlock "tx_en_in126"
DstPort 3
}
}
Line {
SrcBlock "Constant23"
SrcPort 1
DstBlock "tx_en_in126"
DstPort 2
}
Line {
SrcBlock "tx_en_in125"
SrcPort 1
DstBlock "To Register26"
DstPort 1
}
Line {
SrcBlock "Constant14"
SrcPort 1
DstBlock "tx_en_in108"
DstPort 2
}
Line {
SrcBlock "tx_en_in13"
SrcPort 1
DstBlock "To Register12"
DstPort 1
}
Line {
SrcBlock "Constant8"
SrcPort 1
DstBlock "tx_en_in3"
DstPort 1
}
Line {
SrcBlock "Constant10"
SrcPort 1
DstBlock "tx_en_in75"
DstPort 1
}
Line {
SrcBlock "Constant11"
SrcPort 1
DstBlock "tx_en_in51"
DstPort 1
}
Line {
Name "TimeCountReset"
Labels [0, 0]
SrcBlock "Convert3"
SrcPort 1
Points [155, 0]
Branch {
Points [0, 20]
DstBlock "tx_en_in1"
DstPort 1
}
Branch {
DstBlock "tx_en_in2"
DstPort 3
}
}
Line {
SrcBlock "Constant1"
SrcPort 1
DstBlock "tx_en_in2"
DstPort 2
}
Line {
Name "TimeCountTrigger"
Labels [0, 0]
SrcBlock "Convert9"
SrcPort 1
Points [155, 0]
Branch {
DstBlock "tx_en_in10"
DstPort 3
}
Branch {
Points [0, 20]
DstBlock "tx_en_in7"
DstPort 1
}
}
Line {
SrcBlock "Constant3"
SrcPort 1
DstBlock "tx_en_in10"
DstPort 2
}
Line {
SrcBlock "tx_en_in12"
SrcPort 1
DstBlock "tx_en_in10"
DstPort 1
}
Line {
Name "dinb"
Labels [0, 0]
SrcBlock "tx_en_in9"
SrcPort 1
DstBlock "tx_en_in2"
DstPort 1
}
Line {
SrcBlock "tx_en_in105"
SrcPort 1
DstBlock "tx_en_in107"
DstPort 1
}
Line {
SrcBlock "tx_en_in107"
SrcPort 1
DstBlock "Inverter5"
DstPort 1
}
Annotation {
Name "The read Latency is 1 + 1 becouse \nin the BRAM the \"Primitive Output Registersr\" is setted"
Position [581, 2727]
}
Annotation {
Name "CTL bit"
Position [638, 2123]
}
Annotation {
Name "DAQ bit"
Position [642, 2191]
}
Annotation {
Name "DLM bit"
Position [647, 2256]
}
Annotation {
Name "PCIe Rst: Attivo basso"
Position [491, 2381]
}
Annotation {
Name "12 Bit Counter:\ncyclically we read the H2B BRam \nand write the B2H BRam"
Position [281, 2699]
}
}
}
}
}
MatData {
NumRecords 3
DataRecord {
Tag DataTag2
Data " %)30 . L$( 8 ( @ % \" $ ! 0 % 0 !@ $ & <V%V96"
"0 . :$( 8 ( @ % \" $ ! 0 % 0 # $ 8 <VAA<F5D 8V]M<&E"
"L871I;VX #@ .@$ & \" ( !0 @ ! 0 $ !0 $ !, ! F &-O;7!I;&%T:6]N "
" !C;VUP:6QA=&EO;E]L=70 <VEM=6QI;FM?<&5R:6]D &EN8W)?;F5T;&ES= !T<FEM7W9B:71S 9&)L7V"
"]V<F0 &1E<')E8V%T961?8V]N=')O; !B;&]C:U]I8V]N7V1I<W!L87D #@ #@ & \" 0 !0 @ "
"! !P $ $ < !T87)G970S X ! @ !@ @ \" 4 ( 0 $ ! 4 ! '"
" 0 X !K97ES =F%L=65S #@ ! & \" $ !0 @ ! P $ #@ $ & "
" \" 0 !0 @ ! \"P $ $ L !(1$P@3F5T;&ES= #@ $ & \" 0 "
" !0 @ ! \"0 $ $ D !\":71S=')E86T #@ $ & \" 0 !0 @ "
"! \"P $ $ L !.1T,@3F5T;&ES= #@ .@ & \" $ !0 @ ! P $ "
" #@ #@ & \" 0 !0 @ ! !P $ $ < !T87)G970Q X X !@ @ $"
" 4 ( 0 < ! ! ' =&%R9V5T,@ . . 8 ( ! % \" $ ' "
" 0 0 !P '1A<F=E=#, #@ #@ & \" 0 !0 @ ! !P $ $ < !54T"
"527U13 X P !@ @ $ 4 ( 0 , ! ! P!O9F8 #@ $@ & \" 0 "
" !0 @ ! %P $ $ !< !%=F5R>7=H97)E(&EN(%-U8E-Y<W1E;0 . 2 8 ( ! % \""
" $ 8 0 0 & $%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<PX P !@ @ $ 4 ( 0"
" , ! ! P!O9F8 #@ #@ & \" 0 !0 @ ! !P $ $ < !$969A=6Q"
"T X @/0 !@ @ \" 4 ( 0 $ ! 4 ! ( 0 !@ !T87)G970Q '1A<F=E=#( =&%R"
"9V5T,P . .!, 8 ( @ % \" $ ! 0 % 0 '@ $ H!0 :6YF;V5D:70 "
" >&EL:6YX9F%M:6QY <&%R= <W!E960 "
" <&%C:V%G90 <WEN=&AE<VES7W1O;VQ?<V=A9'9A;F-E9 <WEN=&AE<"
"VES7W1O;VP 8VQO8VM?=W)A<'!E<E]S9V%D=F%N8V5D 8VQO8VM?=W)A<'!E<@ 9&E"
"R96-T;W)Y <')O:E]T>7!E7W-G861V86YC960 <')O:E]T>7!E "
" 4WEN=&A?9FEL95]S9V%D=F%N8V5D 4WEN=&A?9FEL90 26UP;%]F:6QE7W-G861V86YC960 "
" 26UP;%]F:6QE =&5S=&)E;F-H7W-G861V86YC960 =&5S=&)E;F-H "
" <WES8VQK7W!E<FEO9 9&-M7VEN<'5T7V-L;V-K7W!E<FEO9 :6YC<E]N971L:7-T7W-"
"G861V86YC960 =')I;5]V8FET<U]S9V%D=F%N8V5D 9&)L7V]V<F1?<V=A9'9A;F-E9 8V]R95]G96YE<"
"F%T:6]N7W-G861V86YC960 8V]R95]G96YE<F%T:6]N <G5N7V-O<F5G96Y?<V=A9'9A;F-E9 <G5N7V-"
"O<F5G96X 9&5P<F5C871E9%]C;VYT<F]L7W-G861V86YC960 979A;%]F:65L9 :"
"&%S7V%D=F%N8V5D7V-O;G1R;VP <V=G=6E?<&]S 8FQO8VM?='EP90 "
" 8FQO8VM?=F5R<VEO;@ <V=?:6-O;E]S=&%T <V=?;6%S:U]D:7-P;&%Y "
" <V=?;&ES=%]C;VYT96YT<P <V=?8FQO8VMG=6E?>&UL 8VQO8VM?;&]C "
" 8W)E871E7VEN=&5R9F%C95]D;V-U;65N= <WEN=&AE<VES7VQA;F=U86=E <WEN=&A?9FEL90 "
" :6UP;%]F:6QE 8V5?8VQR <')E<V5R=F5"
"?:&EE<F%R8VAY #@ $@ & \" 0 !0 @ ! $0 $ $ !$ @4WES=&5M"
"($=E;F5R871O<@ . . 8 ( ! % \" $ ' 0 0 !P '9I<G1E>#8 #@ "
"$ & \" 0 !0 @ ! \"@ $ $ H !X8S9V;'@R-#!T #@ # & \" "
" 0 !0 @ ! @ $ $ \" \"TQ . . 8 ( ! % \" $ & 0 "
" 0 !@ &9F,3$U-@ #@ # & \" 0 !0 @ $ $ . , "
" 8 ( ! % \" $ # 0 0 , 6%-4 X P !@ @ $ 4 ( "
" ! ! #@ $@ & \" 0 !0 @ ! $@ $ $ !( !%>'!O<V4@0V"
"QO8VL@4&]R=', . < 8 ( ! % \" $ _ 0 0 /P $,Z+U1E;7 O6&EL:6Y"
"X(%!#22!%>'!R97-S+W!C:64M=C8M;6PV,#5?25-%,3)?57-E<B]->55S97),;V=I8P . , 8 ( ! % \" "
" 0 0 X !( !@ @ $ 4 ( 0 !$ ! ! 1 4')O:F5C=\""
"!.879I9V%T;W( #@ # & \" 0 !0 @ $ $ . 0 8 "
"( ! % \" $ , 0 0 # %A35\"!$969A=6QT<P . , 8 ( ! "
"% \" 0 0 X ! !@ @ $ 4 ( 0 P ! ! ,"
" 25-%($1E9F%U;'1S X P !@ @ $ 4 ( ! ! #@ # & "
" \" 0 !0 @ ! P $ $ # &]F9@ . . 8 ( ! % \" $ ( "
" 0 0 \" %5315)?0TQ+#@ # & \" 0 !0 @ ! @ $ $ \" #$P . "
" , 8 ( ! % \" 0 0 X P !@ @ $ 4 ( "
" ! ! #@ # & \" 0 !0 @ $ $ . "
" , 8 ( ! % \" 0 0 X !( !@ @ $ 4 ( "
" 0 !@ ! ! 8 06-C;W)D:6YG('1O($)L;V-K($UA<VMS#@ # & \" 0 !0 @ "
" $ $ . , 8 ( ! % \" $ # 0 0 , ;V9F X P !@"
" @ $ 4 ( ! ! #@ # & \" 0 !0 @ ! 0 "
" $ $ ! # . , 8 ( ! % \" $ ! 0 0 $ , X ! !@ "
" @ $ 4 ( 0 L ! ! + +3$L+3$L+3$L+3$ X X !@ @ $ "
"4 ( 0 8 ! ! & <WES9V5N . , 8 ( ! % \" 0 "
" 0 X !@ !@ @ $ 4 ( 0 \"X ! ! N -3 L-3 L+3$L+3$L=&]K96XL"
"=VAI=&4L,\"PP-S<S-\"QR:6=H=\"PL6R!=+%L@70 #@ @# & \" 0 !0 @ ! UP( $ $ -"
"<\" !F<')I;G1F*\"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N(&=R87!H:6-S)RD[\"G!A=&-H*%LP(#4P(#4P(# @,\"!=+%LP(# @-3 @-3 @,\""
"!=+%LQ(#$@,2!=*3L*<&%T8V@H6S$N-C,W-2 Q-BXX,2 R-RXS,2 S-RXX,2 T.\"XS,2 R-RXS,2 Q,BXQ,S<U(#$N-C,W-2!=+%LS-BXV-34@,S8"
"N-C4U(#0W+C$U-2 S-BXV-34@-#<N,34U(#0W+C$U-2 T-RXQ-34@,S8N-C4U(%TL6S N.3,S,S,S(# N,C S.3(R(# N,30Q,3<V(%TI.PIP871C:"
"\"A;,3(N,3,W-2 R-RXS,2 Q-BXX,2 Q+C8S-S4@,3(N,3,W-2!=+%LR-BXQ-34@,C8N,34U(#,V+C8U-2 S-BXV-34@,C8N,34U(%TL6S N-CDX,#"
",Y(# N,#,Q,S<R-2 P+C(Q.38P.\"!=*3L*<&%T8V@H6S$N-C,W-2 Q-BXX,2 R-RXS,2 Q,BXQ,S<U(#$N-C,W-2!=+%LQ-2XV-34@,34N-C4U(#("
"V+C$U-2 R-BXQ-34@,34N-C4U(%TL6S N.3,S,S,S(# N,C S.3(R(# N,30Q,3<V(%TI.PIP871C:\"A;,3(N,3,W-2 T.\"XS,2 S-RXX,2 R-RX"
"S,2 Q-BXX,2 Q+C8S-S4@,3(N,3,W-2!=+%LU+C$U-2 U+C$U-2 Q-2XV-34@-2XQ-34@,34N-C4U(#$U+C8U-2 U+C$U-2!=+%LP+C8Y.# S.2 P+"
"C S,3,W,C4@,\"XR,3DV,#@@72D[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N(&=R87!H:6-S)RD[\"F9P<FEN=&8H)R<L)T-/34U%3E0"
"Z(&)E9VEN(&EC;VX@=&5X=\"<I.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!T97AT)RD[ X P !@ @ $ "
"4 ( ! ! #@ # & \" 0 !0 @ $ $ "
" . , 8 ( ! % \" 0 0 X P !@ @ $ 4 "
" ( 0 , ! ! P!O9F8 #@ # & \" 0 !0 @ ! ! $ $ $ %9(1"
"$P. 0 8 ( ! % \" $ - 0 0 #0 %A35\"!$969A=6QT<RH . 0 8 "
" ( ! % \" $ - 0 0 #0 $E312!$969A=6QT<RH . . 8 ( !@ "
" % \" $ ! 0 ) \" #@ #@ & \" 8 !0 @ ! 0 $ "
" \"0 @ X !@% !@ @ \" 4 ( 0 $ ! 4 ! > 0 ((% "
" !I;F9O961I= !X:6QI;GAF86UI;'D !P87)T "
" !S<&5E9 !P86-K86=E !S>6YT:&5S:7-?=&]O;%]S9V%D="
"F%N8V5D !S>6YT:&5S:7-?=&]O; !C;&]C:U]W<F%P<&5R7W-G861V86YC960 !C;&]C:U]W<F%P<&5R "
" !D:7)E8W1O<GD !P<F]J7W1Y<&5?<V=A9'9A;F-E9 !P<F]J7W1Y<&4 "
" !3>6YT:%]F:6QE7W-G861V86YC960 !3>6YT:%]F:6QE !);7!L7V9"
"I;&5?<V=A9'9A;F-E9 !);7!L7V9I;&4 !T97-T8F5N8VA?<V=A9'9A;F-E9 !T9"
"7-T8F5N8V@ !S>7-C;&M?<&5R:6]D !D8VU?:6YP=71?8VQO8VM?<&5R:6]D "
" !I;F-R7VYE=&QI<W1?<V=A9'9A;F-E9 !T<FEM7W9B:71S7W-G861V86YC960 !D8FQ?;W9R9%]S9V%D=F%N8V5D "
" !C;W)E7V=E;F5R871I;VY?<V=A9'9A;F-E9 !C;W)E7V=E;F5R871I;VX !R=6Y?8V]R96=E;E]S9V%D=F%"
"N8V5D !R=6Y?8V]R96=E;@ !D97!R96-A=&5D7V-O;G1R;VQ?<V=A9'9A;F-E9 !E=F%L7V9I96QD "
" !H87-?861V86YC961?8V]N=')O; !S9V=U:5]P;W, !B;&]C:U]T>7!"
"E !B;&]C:U]V97)S:6]N !S9U]I8V]N7W-T870 !S9U]M8"
"7-K7V1I<W!L87D !S9U]L:7-T7V-O;G1E;G1S !S9U]B;&]C:V=U:5]X;6P !"
"C;&]C:U]L;V, !C<F5A=&5?:6YT97)F86-E7V1O8W5M96YT !S>6YT:&5S:7-?;&%N9W5A9V4 "
" !S>6YT:%]F:6QE !I;7!L7V9I;&4 !C95]C;'( "
" !P<F5S97)V95]H:65R87)C:'D !V97)S:6]N !P;W-T9V5N97)A=&EO;E]F8"
"VX !S971T:6YG<U]F8VX . 2 8 ( ! % \" $ "
" 1 0 0 $0 \"!3>7-T96T@1V5N97)A=&]R X X !@ @ $ 4 ( 0 @ "
"! ! ( <W!A<G1A;C8. 0 8 ( ! % \" $ ) 0 0 \"0 'AC-G-"
"L>#0U= . , 8 ( ! % \" $ \" 0 0 ( +3, X X !@ @ "
"$ 4 ( 0 8 ! ! & 9F=G-#@T . , 8 ( ! % \" "
" 0 0 X P !@ @ $ 4 ( 0 , ! ! P!84U0 #@ # & "
" \" 0 !0 @ $ $ . 0 8 ( ! % \" $ - "
" 0 0 #0 $-L;V-K($5N86)L97, . 6 8 ( ! % \" $ F 0 0 "
" )@ $,Z+U1E;7 O6&EL:6YX34E'+U-Y<T=E;B]3>7-'96Y?0DE47S Q . , 8 ( ! % \" "
" 0 0 X !( !@ @ $ 4 ( 0 !$ ! ! 1 4')O:F5C=\"!.879I9"
"V%T;W( #@ # & \" 0 !0 @ $ $ . 0 8 ( ! "
" % \" $ , 0 0 # %A35\"!$969A=6QT<P . , 8 ( ! % \""
" 0 0 X ! !@ @ $ 4 ( 0 P ! ! , 25-"
"%($1E9F%U;'1S X P !@ @ $ 4 ( ! ! #@ # & \" "
" 0 !0 @ ! P $ $ # &]F9@ . 0 8 ( ! % \" $ ) 0 "
" 0 \"0 %-0-C U7T-,2P . , 8 ( ! % \" $ \" 0 0 ( ,3 "
" X P !@ @ $ 4 ( ! ! #@ # & \" 0 !0 "
" @ $ $ . , 8 ( ! % \" 0 0 "
"X P !@ @ $ 4 ( ! ! #@ $@ & \" 0 !0 @"
" ! & $ $ !@ !!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,. , 8 ( ! % \" "
" 0 0 X P !@ @ $ 4 ( 0 , ! ! P!O9F8 #@ # "
" & \" 0 !0 @ $ $ . , 8 ( ! % \" $ "
" ! 0 0 $ , X P !@ @ $ 4 ( 0 $ ! ! 0 P #@ $ "
"& \" 0 !0 @ ! \"P $ $ L M,2PM,2PM,2PM,0 #@ #@ & \" 0 "
" !0 @ ! !@ $ $ 8 !S>7-G96X X P !@ @ $ 4 ( !"
" ! #@ & & \" 0 !0 @ ! +@ $ $ \"X U,\"PU,\"PM,2PM,2"
"QT;VME;BQW:&ET92PP+# W-S,T+')I9VAT+\"Q;(%TL6R!= . \" , 8 ( ! % \" $ #7 @ 0 "
" 0 UP( &9P<FEN=&8H)R<L)T-/34U%3E0Z(&)E9VEN(&EC;VX@9W)A<&AI8W,G*3L*<&%T8V@H6S @-3 @-3 @,\" P(%TL6S @,\" U,\" U"
",\" P(%TL6S$@,2 Q(%TI.PIP871C:\"A;,2XV,S<U(#$V+C@Q(#(W+C,Q(#,W+C@Q(#0X+C,Q(#(W+C,Q(#$R+C$S-S4@,2XV,S<U(%TL6S,V+C8U"
"-2 S-BXV-34@-#<N,34U(#,V+C8U-2 T-RXQ-34@-#<N,34U(#0W+C$U-2 S-BXV-34@72Q;,\"XY,S,S,S,@,\"XR,#,Y,C(@,\"XQ-#$Q-S8@72D"
"[\"G!A=&-H*%LQ,BXQ,S<U(#(W+C,Q(#$V+C@Q(#$N-C,W-2 Q,BXQ,S<U(%TL6S(V+C$U-2 R-BXQ-34@,S8N-C4U(#,V+C8U-2 R-BXQ-34@72Q;"
",\"XV.3@P,SD@,\"XP,S$S-S(U(# N,C$Y-C X(%TI.PIP871C:\"A;,2XV,S<U(#$V+C@Q(#(W+C,Q(#$R+C$S-S4@,2XV,S<U(%TL6S$U+C8U-2 "
"Q-2XV-34@,C8N,34U(#(V+C$U-2 Q-2XV-34@72Q;,\"XY,S,S,S,@,\"XR,#,Y,C(@,\"XQ-#$Q-S8@72D[\"G!A=&-H*%LQ,BXQ,S<U(#0X+C,Q("
"#,W+C@Q(#(W+C,Q(#$V+C@Q(#$N-C,W-2 Q,BXQ,S<U(%TL6S4N,34U(#4N,34U(#$U+C8U-2 U+C$U-2 Q-2XV-34@,34N-C4U(#4N,34U(%TL6S "
"N-CDX,#,Y(# N,#,Q,S<R-2 P+C(Q.38P.\"!=*3L*9G!R:6YT9B@G)RPG0T]-345.5#H@96YD(&EC;VX@9W)A<&AI8W,G*3L*9G!R:6YT9B@G)RPG"
"0T]-345.5#H@8F5G:6X@:6-O;B!T97AT)RD[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N('1E>'0G*3L #@ # & \" 0"
" !0 @ $ $ . , 8 ( ! % \" 0 "
" 0 X P !@ @ $ 4 ( ! ! #@ # & \" 0 "
" !0 @ ! P $ $ # &]F9@ . , 8 ( ! % \" $ $ 0 "
" 0 0 5DA$3 X ! !@ @ $ 4 ( 0 T ! ! - 6%-4($1E9F%U;'1S*@ X ! "
" !@ @ $ 4 ( 0 T ! ! - 25-%($1E9F%U;'1S*@ X X !@ @ & "
" 4 ( 0 $ ! D ( . . 8 ( !@ % \" $ ! "
" 0 ) \" #@ # & \" 0 !0 @ ! ! $ $ $ #$Q+C(. "
" 4 8 ( ! % \" $ 9 0 0 &0 'AL0FET<W1R96%M4&]S=$=E;F5R871I;VX "
"#@ $@ & \" 0 !0 @ ! % $ $ !0 !X;%1O<$QE=F5L3F5T;&ES=$=520 . ("
"!4 8 ( @ % \" $ ! 0 % 0 '@ $ \"\"!0 :6YF;V5D:70 "
" >&EL:6YX9F%M:6QY <&%R= <W!E960 "
" <&%C:V%G90 <WEN=&AE<VES7W1O;VQ?<V=A9'9A;F-E9 <WEN=&AE<VES7W1O;VP "
" 8VQO8VM?=W)A<'!E<E]S9V%D=F%N8V5D 8VQO8VM?=W)A<'!E<@ 9&ER96-T;W)Y "
" <')O:E]T>7!E7W-G861V86YC960 <')O:E]T>7!E 4WEN=&A?"
"9FEL95]S9V%D=F%N8V5D 4WEN=&A?9FEL90 26UP;%]F:6QE7W-G861V86YC960 26"
"UP;%]F:6QE =&5S=&)E;F-H7W-G861V86YC960 =&5S=&)E;F-H "
" <WES8VQK7W!E<FEO9 9&-M7VEN<'5T7V-L;V-K7W!E<FEO9 :6YC<E]N971L:7-T7W-G861V86YC96"
"0 =')I;5]V8FET<U]S9V%D=F%N8V5D 9&)L7V]V<F1?<V=A9'9A;F-E9 8V]R95]G96YE<F%T:6]N7W-G"
"861V86YC960 8V]R95]G96YE<F%T:6]N <G5N7V-O<F5G96Y?<V=A9'9A;F-E9 <G5N7V-O<F5G96X "
" 9&5P<F5C871E9%]C;VYT<F]L7W-G861V86YC960 979A;%]F:65L9 :&%S7V%D=F%N"
"8V5D7V-O;G1R;VP <V=G=6E?<&]S 8FQO8VM?='EP90 8FQO8V"
"M?=F5R<VEO;@ <V=?:6-O;E]S=&%T <V=?;6%S:U]D:7-P;&%Y "
"<V=?;&ES=%]C;VYT96YT<P <V=?8FQO8VMG=6E?>&UL 8VQO8VM?;&]C "
" 8W)E871E7VEN=&5R9F%C95]D;V-U;65N= <WEN=&AE<VES7VQA;F=U86=E <WEN=&A?9FEL90 "
" :6UP;%]F:6QE 8V5?8VQR <')E<V5R=F5?:&EE<F%R8V"
"AY <&]S=&=E;F5R871I;VY?9F-N <V5T=&EN9W-?9F-N ;F=C7V-O;F9I9P "
" #@ $@ & \" 0 !0 @ ! $0 $ $ !$ @4WES="
"&5M($=E;F5R871O<@ . . 8 ( ! % \" $ ( 0 0 \" '-P87)T86XV#"
"@ $ & \" 0 !0 @ ! \"0 $ $ D !X8S9S;'@T-70 #@ # & \""
" 0 !0 @ ! @ $ $ \" \"TS . . 8 ( ! % \" $ & "
" 0 0 !@ &9G9S0X- #@ # & \" 0 !0 @ $ $ . ,"
" 8 ( ! % \" $ # 0 0 , 6%-4 X P !@ @ $ 4 ( "
" ! ! #@ $ & \" 0 !0 @ ! #0 $ $ T !#;&]C:R!"
"%;F%B;&5S #@ '@ & \" 0 !0 @ ! 10 $ $ $4 !#.B]496UP+UAI;&EN>\"!00TD"
"@17AP<F5S<R]P8VEE+78V+6UL-C U7TE313$R7U5S97(O37E5<V5R3&]G:6,O5&5S=#$ . , 8 ( ! % \" "
" 0 0 X !( !@ @ $ 4 ( 0 !$ ! ! 1 4')O:F"
"5C=\"!.879I9V%T;W( #@ # & \" 0 !0 @ $ $ . 0 "
"8 ( ! % \" $ , 0 0 # %A35\"!$969A=6QT<P . , 8 ( ! "
" % \" 0 0 X ! !@ @ $ 4 ( 0 P ! ! "
" , 25-%($1E9F%U;'1S X P !@ @ $ 4 ( ! ! #@ # "
" & \" 0 !0 @ ! P $ $ # &]F9@ . . 8 ( ! % \" $ "
" ( 0 0 \" %5315)?0TQ+#@ # & \" 0 !0 @ ! 0 $ $ ! #4 "
" . , 8 ( ! % \" 0 0 X P !@ @ $ 4 "
" ( ! ! #@ # & \" 0 !0 @ $ $ "
". , 8 ( ! % \" 0 0 X !( !@ @ $ 4 ("
" 0 !@ ! ! 8 06-C;W)D:6YG('1O($)L;V-K($UA<VMS#@ # & \" 0 !0 @ "
" $ $ . , 8 ( ! % \" $ # 0 0 , ;V9F X P "
" !@ @ $ 4 ( ! ! #@ # & \" 0 !0 @ ! "
" 0 $ $ ! # . , 8 ( ! % \" $ ! 0 0 $ , X ! "
"!@ @ $ 4 ( 0 L ! ! + +3$L+3$L+3$L+3$ X X !@ @ $ "
" 4 ( 0 8 ! ! & <WES9V5N . , 8 ( ! % \" 0 "
" 0 X !@ !@ @ $ 4 ( 0 \"X ! ! N -3 L-3 L+3$L+3$L=&]K"
"96XL=VAI=&4L,\"PP-S<S-\"QR:6=H=\"PL6R!=+%L@70 #@ @# & \" 0 !0 @ ! UP( $ $ "
" -<\" !F<')I;G1F*\"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N(&=R87!H:6-S)RD[\"G!A=&-H*%LP(#4P(#4P(# @,\"!=+%LP(# @-3 @-3 "
"@,\"!=+%LQ(#$@,2!=*3L*<&%T8V@H6S$N-C,W-2 Q-BXX,2 R-RXS,2 S-RXX,2 T.\"XS,2 R-RXS,2 Q,BXQ,S<U(#$N-C,W-2!=+%LS-BXV-34"
"@,S8N-C4U(#0W+C$U-2 S-BXV-34@-#<N,34U(#0W+C$U-2 T-RXQ-34@,S8N-C4U(%TL6S N.3,S,S,S(# N,C S.3(R(# N,30Q,3<V(%TI.PIP8"
"71C:\"A;,3(N,3,W-2 R-RXS,2 Q-BXX,2 Q+C8S-S4@,3(N,3,W-2!=+%LR-BXQ-34@,C8N,34U(#,V+C8U-2 S-BXV-34@,C8N,34U(%TL6S N-C"
"DX,#,Y(# N,#,Q,S<R-2 P+C(Q.38P.\"!=*3L*<&%T8V@H6S$N-C,W-2 Q-BXX,2 R-RXS,2 Q,BXQ,S<U(#$N-C,W-2!=+%LQ-2XV-34@,34N-C4"
"U(#(V+C$U-2 R-BXQ-34@,34N-C4U(%TL6S N.3,S,S,S(# N,C S.3(R(# N,30Q,3<V(%TI.PIP871C:\"A;,3(N,3,W-2 T.\"XS,2 S-RXX,2 "
"R-RXS,2 Q-BXX,2 Q+C8S-S4@,3(N,3,W-2!=+%LU+C$U-2 U+C$U-2 Q-2XV-34@-2XQ-34@,34N-C4U(#$U+C8U-2 U+C$U-2!=+%LP+C8Y.# S."
"2 P+C S,3,W,C4@,\"XR,3DV,#@@72D[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N(&=R87!H:6-S)RD[\"F9P<FEN=&8H)R<L)T-/34U"
"%3E0Z(&)E9VEN(&EC;VX@=&5X=\"<I.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!T97AT)RD[ X P !@ @ $ "
" 4 ( ! ! #@ # & \" 0 !0 @ $ $ "
" . , 8 ( ! % \" 0 0 X P !@ @ $ "
" 4 ( 0 , ! ! P!O9F8 #@ # & \" 0 !0 @ ! ! $ $ $ "
"%9(1$P. 0 8 ( ! % \" $ - 0 0 #0 %A35\"!$969A=6QT<RH . 0 "
" 8 ( ! % \" $ - 0 0 #0 $E312!$969A=6QT<RH . . 8 ( !@ "
" % \" $ ! 0 ) \" #@ #@ & \" 8 !0 @ ! 0 "
" $ \"0 @ X !( !@ @ $ 4 ( 0 !, ! ! 3 >&Q.1T"
"-0;W-T1V5N97)A=&EO;@ #@ $ & \" 0 !0 @ ! #0 $ $ T !X;&YG8W-E='1"
"I;F=S #@ .@ & \" ( !0 @ ! 0 $ !0 $ !4 ! *@ &EN8VQU9&5?8VQO8VMW"
"<F%P<&5R &EN8VQU9&5?8V8 X X !@ @ & 4 ( 0 $ ! D "
" ( \\#\\. . 8 ( !@ % \" $ ! 0 ) \" "
}
DataRecord {
Tag DataTag1
Data " %)30 . . , 8 ( @ % \" $ ! 0 % 0 &0 $ #( 9F%M:6"
"QY &1E=FEC90 !S<&5E9 <&%C:V%G90 "
" &1I<F5C=&]R>0 !S>6YT:&5S:7-?=&]O; ;&%N9W5A9V4 &"
"1O7VYO=%]E;6)E9%]C;VYS=')A:6YT<P . . 8 ( ! % \" $ ' 0 0 !P '9I<G1"
"E>#8 #@ $ & \" 0 !0 @ ! \"@ $ $ H !X8S9V;'@R-#!T #@ # "
"& \" 0 !0 @ ! @ $ $ \" \"TS . . 8 ( ! % \" $ "
" % 0 0 !0 &9F-S@T #@ '@ & \" 0 !0 @ ! 1 $ $ $0 "
"!#.EQ496UP7%AI;&EN>\"!00TD@17AP<F5S<UQP8VEE+78V+6UL-C U7TE313$R7T]P96Y#;W)E<UQ->55S97),;V=I8P . , 8 "
"( ! % \" $ # 0 0 , 6%-4 X X !@ @ & 4 ( 0 $ !"
" D ( \\#\\. . 8 ( !@ % \" $ ! 0 ) \" "
" "
}
DataRecord {
Tag DataTag0
Data " %)30 . Z(4 8 ( @ % \" $ ! 0 % 0 !@ $ , <V%V96"
"0 =V]R:P X #(0@ !@ @ \" 4 ( 0 $ ! 4 ! , 0 !@ !S:&%R960 "
" !C;VUP:6QA=&EO;@ . Z 0 8 ( @ % \" $ ! 0 % 0 $P $ \"8 8V]M<&E"
"L871I;VX &-O;7!I;&%T:6]N7VQU= !S:6UU;&EN:U]P97)I;V0 :6YC<E]N971L:7-T '1R:6U?=F)I=', "
" !D8FQ?;W9R9 9&5P<F5C871E9%]C;VYT<F]L &)L;V-K7VEC;VY?9&ES<&QA>0 . . 8 ( ! "
"% \" $ ' 0 0 !P '1A<F=E=#, #@ $ \" & \" ( !0 @ ! 0 $ "
" !0 $ < ! #@ &ME>7, !V86QU97, . $ 8 ( 0 % \" $ # 0 "
". 0 8 ( ! % \" $ + 0 0 \"P $A$3\"!.971L:7-T . 0 8 "
" ( ! % \" $ ) 0 0 \"0 $)I='-T<F5A;0 . 0 8 ( ! "
" % \" $ + 0 0 \"P $Y'0R!.971L:7-T . Z 8 ( 0 % \" $ "
" # 0 . . 8 ( ! % \" $ ' 0 0 !P '1A<F=E=#$ #@ #@ "
" & \" 0 !0 @ ! !P $ $ < !T87)G970R X X !@ @ $ 4 "
"( 0 < ! ! ' =&%R9V5T,P . . 8 ( ! % \" $ ' 0 0"
" !P %!#245?5%, #@ # & \" 0 !0 @ ! P $ $ # &]F9@ . 2 8 ( "
" ! % \" $ 7 0 0 %P $5V97)Y=VAE<F4@:6X@4W5B4WES=&5M X !( !@ @ $ "
" 4 ( 0 !@ ! ! 8 06-C;W)D:6YG('1O($)L;V-K($UA<VMS#@ # & \" 0 "
" !0 @ ! P $ $ # &]F9@ . . 8 ( ! % \" $ ' 0 0 "
"!P $1E9F%U;'0 #@ ( ] & \" ( !0 @ ! 0 $ !0 $ @ ! & '1A<F=E=#$ ="
"&%R9V5T,@!T87)G970S X !P$P !@ @ \" 4 ( 0 $ ! 4 ! > 0 \"@% !I;F9O9"
"61I= !X:6QI;GAF86UI;'D !P87)T !"
"S<&5E9 !P86-K86=E !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D "
" !S>6YT:&5S:7-?=&]O; !C;&]C:U]W<F%P<&5R7W-G861V86YC960 !C;&]C:U]W<F%P<&5R "
" !D:7)E8W1O<GD !P<F]J7W1Y<&5?<V=A9'9A;F-E9 !P<F]J7W1Y<&4 "
" !3>6YT:%]F:6QE7W-G861V86YC960 !3>6YT:%]F:6QE !);7!L7V9I;&5?<V="
"A9'9A;F-E9 !);7!L7V9I;&4 !T97-T8F5N8VA?<V=A9'9A;F-E9 !T97-T8F5N8"
"V@ !S>7-C;&M?<&5R:6]D !D8VU?:6YP=71?8VQO8VM?<&5R:6]D !I;F-"
"R7VYE=&QI<W1?<V=A9'9A;F-E9 !T<FEM7W9B:71S7W-G861V86YC960 !D8FQ?;W9R9%]S9V%D=F%N8V5D "
" !C;W)E7V=E;F5R871I;VY?<V=A9'9A;F-E9 !C;W)E7V=E;F5R871I;VX !R=6Y?8V]R96=E;E]S9V%D=F%N8V5D "
" !R=6Y?8V]R96=E;@ !D97!R96-A=&5D7V-O;G1R;VQ?<V=A9'9A;F-E9 !E=F%L7V9I96QD "
" !H87-?861V86YC961?8V]N=')O; !S9V=U:5]P;W, !B;&]C:U]T>7!E "
" !B;&]C:U]V97)S:6]N !S9U]I8V]N7W-T870 !S9U]M87-K7V1I<"
"W!L87D !S9U]L:7-T7V-O;G1E;G1S !S9U]B;&]C:V=U:5]X;6P !C;&]C:U]"
"L;V, !C<F5A=&5?:6YT97)F86-E7V1O8W5M96YT !S>6YT:&5S:7-?;&%N9W5A9V4 !S>"
"6YT:%]F:6QE !I;7!L7V9I;&4 !C95]C;'( "
" !P<F5S97)V95]H:65R87)C:'D . 2 8 ( ! % \" $ 1 0 0 "
"$0 \"!3>7-T96T@1V5N97)A=&]R X X !@ @ $ 4 ( 0 < ! ! ' ="
"FER=&5X-@ . 0 8 ( ! % \" $ * 0 0 \"@ 'AC-G9L>#(T,'0 . ,"
" 8 ( ! % \" $ \" 0 0 ( +3, X X !@ @ $ 4 ( "
"0 4 ! ! % 9F8W.#0 . , 8 ( ! % \" 0 0 "
" X P !@ @ $ 4 ( 0 , ! ! P!84U0 #@ # & \" 0 !0 "
" @ $ $ . 2 8 ( ! % \" $ 2 0 0 $@ "
" $5X<&]S92!#;&]C:R!0;W)T<P X \"H !@ @ $ 4 ( 0 '0 ! ! !T 0SHO5"
"&5M<\"]8:6QI;G@@4$-)($5X<')E<W,O<&-I92UV-BUM;#8P-5])4T4Q,E]5<V5R+TUY57-E<DQO9VEC375L=&E4:6UI;F<O=&]P7VQE=F5L7S!?4$"
"-)95]5<V5R3&]G:6-?,#-?24Y/551?3$]'24, #@ # & \" 0 !0 @ $ $ "
" . 2 8 ( ! % \" $ 1 0 0 $0 %!R;VIE8W0@3F%V:6=A=&]R X "
" P !@ @ $ 4 ( ! ! #@ $ & \" 0 !0 @ "
" ! # $ $ P !84U0@1&5F875L=', #@ # & \" 0 !0 @ $ "
" $ . 0 8 ( ! % \" $ , 0 0 # $E312!$969A=6QT<P "
". , 8 ( ! % \" 0 0 X P !@ @ $ 4 ("
" 0 , ! ! P!O9F8 #@ #@ & \" 0 !0 @ ! \" $ $ @ !0"
"0TE%7T-,2PX P !@ @ $ 4 ( 0 $ ! ! 0 U #@ # & \" 0 "
" !0 @ $ $ . , 8 ( ! % \" 0 0 "
" X P !@ @ $ 4 ( ! ! #@ # & \" 0 "
" !0 @ $ $ . 2 8 ( ! % \" $ 8 0 0 "
"& $%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<PX P !@ @ $ 4 ( ! ! #"
"@ # & \" 0 !0 @ ! P $ $ # &]F9@ . , 8 ( ! % \""
" 0 0 X P !@ @ $ 4 ( 0 $ ! ! 0 P #@ "
" # & \" 0 !0 @ ! 0 $ $ ! # . 0 8 ( ! % \" "
" $ + 0 0 \"P \"TQ+\"TQ+\"TQ+\"TQ . . 8 ( ! % \" $ & "
" 0 0 !@ '-Y<V=E;@ #@ # & \" 0 !0 @ $ $ . "
"8 8 ( ! % \" $ N 0 0 +@ #4P+#4P+\"TQ+\"TQ+'1O:V5N+'=H:71E+# L,#<W,S0"
"L<FEG:'0L+%L@72Q;(%T X ( P !@ @ $ 4 ( 0 -<\" ! ! #7 @ 9G!R:6YT9B@G)RPG"
"0T]-345.5#H@8F5G:6X@:6-O;B!G<F%P:&EC<R<I.PIP871C:\"A;,\" U,\" U,\" P(# @72Q;,\" P(#4P(#4P(# @72Q;,2 Q(#$@72D[\"G!A"
"=&-H*%LQ+C8S-S4@,38N.#$@,C<N,S$@,S<N.#$@-#@N,S$@,C<N,S$@,3(N,3,W-2 Q+C8S-S4@72Q;,S8N-C4U(#,V+C8U-2 T-RXQ-34@,S8N-C"
"4U(#0W+C$U-2 T-RXQ-34@-#<N,34U(#,V+C8U-2!=+%LP+CDS,S,S,R P+C(P,SDR,B P+C$T,3$W-B!=*3L*<&%T8V@H6S$R+C$S-S4@,C<N,S$@"
",38N.#$@,2XV,S<U(#$R+C$S-S4@72Q;,C8N,34U(#(V+C$U-2 S-BXV-34@,S8N-C4U(#(V+C$U-2!=+%LP+C8Y.# S.2 P+C S,3,W,C4@,\"XR,"
"3DV,#@@72D[\"G!A=&-H*%LQ+C8S-S4@,38N.#$@,C<N,S$@,3(N,3,W-2 Q+C8S-S4@72Q;,34N-C4U(#$U+C8U-2 R-BXQ-34@,C8N,34U(#$U+C"
"8U-2!=+%LP+CDS,S,S,R P+C(P,SDR,B P+C$T,3$W-B!=*3L*<&%T8V@H6S$R+C$S-S4@-#@N,S$@,S<N.#$@,C<N,S$@,38N.#$@,2XV,S<U(#$R"
"+C$S-S4@72Q;-2XQ-34@-2XQ-34@,34N-C4U(#4N,34U(#$U+C8U-2 Q-2XV-34@-2XQ-34@72Q;,\"XV.3@P,SD@,\"XP,S$S-S(U(# N,C$Y-C X"
"(%TI.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!G<F%P:&EC<R<I.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N('1E>'"
"0G*3L*9G!R:6YT9B@G)RPG0T]-345.5#H@96YD(&EC;VX@=&5X=\"<I.P . , 8 ( ! % \" 0"
" 0 X P !@ @ $ 4 ( ! ! #@ # & \" "
" 0 !0 @ $ $ . , 8 ( ! % \" $ # 0 "
" 0 , ;V9F X P !@ @ $ 4 ( 0 0 ! ! ! !62$1,#@ $ & \" "
" 0 !0 @ ! #0 $ $ T !84U0@1&5F875L=',J #@ $ & \" 0 !0 "
"@ ! #0 $ $ T !)4T4@1&5F875L=',J #@ #@ & \" 8 !0 @ ! 0 $"
" \"0 @ X X !@ @ & 4 ( 0 $ ! D ( "
" . 8!0 8 ( @ % \" $ ! 0 % 0 '@ $ \"\"!0 :6YF;V5D:70 "
" >&EL:6YX9F%M:6QY <&%R= <W!E960 "
" <&%C:V%G90 <WEN=&AE<VES7W1O;VQ?<V=A9'9A;F-E9 <WEN=&AE<VE"
"S7W1O;VP 8VQO8VM?=W)A<'!E<E]S9V%D=F%N8V5D 8VQO8VM?=W)A<'!E<@ 9&ER9"
"6-T;W)Y <')O:E]T>7!E7W-G861V86YC960 <')O:E]T>7!E "
" 4WEN=&A?9FEL95]S9V%D=F%N8V5D 4WEN=&A?9FEL90 26UP;%]F:6QE7W-G861V86YC960 "
" 26UP;%]F:6QE =&5S=&)E;F-H7W-G861V86YC960 =&5S=&)E;F-H "
" <WES8VQK7W!E<FEO9 9&-M7VEN<'5T7V-L;V-K7W!E<FEO9 :6YC<E]N971L:7-T7W-G8"
"61V86YC960 =')I;5]V8FET<U]S9V%D=F%N8V5D 9&)L7V]V<F1?<V=A9'9A;F-E9 8V]R95]G96YE<F%"
"T:6]N7W-G861V86YC960 8V]R95]G96YE<F%T:6]N <G5N7V-O<F5G96Y?<V=A9'9A;F-E9 <G5N7V-O<"
"F5G96X 9&5P<F5C871E9%]C;VYT<F]L7W-G861V86YC960 979A;%]F:65L9 :&%"
"S7V%D=F%N8V5D7V-O;G1R;VP <V=G=6E?<&]S 8FQO8VM?='EP90 "
" 8FQO8VM?=F5R<VEO;@ <V=?:6-O;E]S=&%T <V=?;6%S:U]D:7-P;&%Y "
" <V=?;&ES=%]C;VYT96YT<P <V=?8FQO8VMG=6E?>&UL 8VQO8VM?;&]C "
" 8W)E871E7VEN=&5R9F%C95]D;V-U;65N= <WEN=&AE<VES7VQA;F=U86=E <WEN=&A?9FEL90 "
" :6UP;%]F:6QE 8V5?8VQR <')E<V5R=F5?:"
"&EE<F%R8VAY =F5R<VEO;@ <&]S=&=E;F5R871I;VY?9F-N <V5T=&E"
"N9W-?9F-N #@ $@ & \" 0 !0 @ ! $0 $ $ !$ "
" @4WES=&5M($=E;F5R871O<@ . . 8 ( ! % \" $ ( 0 0 \" '-P"
"87)T86XV#@ $ & \" 0 !0 @ ! \"0 $ $ D !X8S9S;'@T-70 #@ # "
" & \" 0 !0 @ ! @ $ $ \" \"TS . . 8 ( ! % \" "
"$ & 0 0 !@ &9G9S0X- #@ # & \" 0 !0 @ $ $ "
" . , 8 ( ! % \" $ # 0 0 , 6%-4 X P !@ @ $ 4 "
" ( ! ! #@ $ & \" 0 !0 @ ! #0 $ $ T "
" !#;&]C:R!%;F%B;&5S #@ %@ & \" 0 !0 @ ! )@ $ $ \"8 !#.B]496UP+UAI;"
"&EN>$U)1R]3>7-'96XO4WES1V5N7T))5%\\P,0 #@ # & \" 0 !0 @ $ $ "
" . 2 8 ( ! % \" $ 1 0 0 $0 %!R;VIE8W0@3F%V:6=A=&]R X "
" P !@ @ $ 4 ( ! ! #@ $ & \" 0 !0 @ "
"! # $ $ P !84U0@1&5F875L=', #@ # & \" 0 !0 @ $ "
" $ . 0 8 ( ! % \" $ , 0 0 # $E312!$969A=6QT<P . "
" , 8 ( ! % \" 0 0 X P !@ @ $ 4 ( "
" 0 , ! ! P!O9F8 #@ $ & \" 0 !0 @ ! \"0 $ $ D !34#"
"8P-5]#3$L #@ # & \" 0 !0 @ ! @ $ $ \" #$P . , 8 ( "
" ! % \" 0 0 X P !@ @ $ 4 ( ! "
" ! #@ # & \" 0 !0 @ $ $ . , 8 ( "
"! % \" 0 0 X !( !@ @ $ 4 ( 0 !@ ! "
" ! 8 06-C;W)D:6YG('1O($)L;V-K($UA<VMS#@ # & \" 0 !0 @ $ $ "
" . , 8 ( ! % \" $ # 0 0 , ;V9F X P !@ @ $ "
" 4 ( ! ! #@ # & \" 0 !0 @ ! 0 $ $ !"
" # . , 8 ( ! % \" $ ! 0 0 $ , X ! !@ @ $ "
" 4 ( 0 L ! ! + +3$L+3$L+3$L+3$ X X !@ @ $ 4 ( 0 8"
" ! ! & <WES9V5N . , 8 ( ! % \" 0 0 X "
" !@ !@ @ $ 4 ( 0 \"X ! ! N -3 L-3 L+3$L+3$L=&]K96XL=VAI=&4L,\"PP-S<S"
"-\"QR:6=H=\"PL6R!=+%L@70 #@ @# & \" 0 !0 @ ! UP( $ $ -<\" !F<')I;G1F*\""
"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N(&=R87!H:6-S)RD[\"G!A=&-H*%LP(#4P(#4P(# @,\"!=+%LP(# @-3 @-3 @,\"!=+%LQ(#$@,2!=*3L*"
"<&%T8V@H6S$N-C,W-2 Q-BXX,2 R-RXS,2 S-RXX,2 T.\"XS,2 R-RXS,2 Q,BXQ,S<U(#$N-C,W-2!=+%LS-BXV-34@,S8N-C4U(#0W+C$U-2 S-"
"BXV-34@-#<N,34U(#0W+C$U-2 T-RXQ-34@,S8N-C4U(%TL6S N.3,S,S,S(# N,C S.3(R(# N,30Q,3<V(%TI.PIP871C:\"A;,3(N,3,W-2 R-R"
"XS,2 Q-BXX,2 Q+C8S-S4@,3(N,3,W-2!=+%LR-BXQ-34@,C8N,34U(#,V+C8U-2 S-BXV-34@,C8N,34U(%TL6S N-CDX,#,Y(# N,#,Q,S<R-2 P"
"+C(Q.38P.\"!=*3L*<&%T8V@H6S$N-C,W-2 Q-BXX,2 R-RXS,2 Q,BXQ,S<U(#$N-C,W-2!=+%LQ-2XV-34@,34N-C4U(#(V+C$U-2 R-BXQ-34@,"
"34N-C4U(%TL6S N.3,S,S,S(# N,C S.3(R(# N,30Q,3<V(%TI.PIP871C:\"A;,3(N,3,W-2 T.\"XS,2 S-RXX,2 R-RXS,2 Q-BXX,2 Q+C8S-"
"S4@,3(N,3,W-2!=+%LU+C$U-2 U+C$U-2 Q-2XV-34@-2XQ-34@,34N-C4U(#$U+C8U-2 U+C$U-2!=+%LP+C8Y.# S.2 P+C S,3,W,C4@,\"XR,3"
"DV,#@@72D[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N(&=R87!H:6-S)RD[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&)E9VEN(&EC;VX@="
"&5X=\"<I.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!T97AT)RD[ X P !@ @ $ 4 ( "
" ! ! #@ # & \" 0 !0 @ $ $ . , 8 "
" ( ! % \" 0 0 X P !@ @ $ 4 ( 0 , "
" ! ! P!O9F8 #@ # & \" 0 !0 @ ! ! $ $ $ %9(1$P. 0 8 "
"( ! % \" $ - 0 0 #0 %A35\"!$969A=6QT<RH . 0 8 ( ! "
"% \" $ - 0 0 #0 $E312!$969A=6QT<RH . . 8 ( !@ % \" $ "
"! 0 ) \" #@ #@ & \" 8 !0 @ ! 0 $ \"0 @ "
" X P !@ @ $ 4 ( 0 0 ! ! ! Q,2XR#@ % & \" 0 "
" !0 @ ! &0 $ $ !D !X;$)I='-T<F5A;5!O<W1'96YE<F%T:6]N X !( !@ @ $ "
" 4 ( 0 !0 ! ! 4 >&Q4;W!,979E;$YE=&QI<W1'54D #@ $@5 & \" ( "
" !0 @ ! 0 $ !0 $ !X ! @@4 &EN9F]E9&ET 'AI;&EN>&9A;6EL>0 "
" '!A<G0 '-P965D '!A8VMA9V4 "
" '-Y;G1H97-I<U]T;V]L7W-G861V86YC960 '-Y;G1H97-I<U]T;V]L &-L;V-K"
"7W=R87!P97)?<V=A9'9A;F-E9 &-L;V-K7W=R87!P97( &1I<F5C=&]R>0 '"
"!R;VI?='EP95]S9V%D=F%N8V5D '!R;VI?='EP90 %-Y;G1H7V9I;&5?<V=A9'9A;F-E9 "
" %-Y;G1H7V9I;&4 $EM<&Q?9FEL95]S9V%D=F%N8V5D $EM<&Q?9FEL90 "
" '1E<W1B96YC:%]S9V%D=F%N8V5D '1E<W1B96YC: '-Y<V-L:U]P97)I;V0 "
" &1C;5]I;G!U=%]C;&]C:U]P97)I;V0 &EN8W)?;F5T;&ES=%]S9V%D=F%N8V5D '1R:6U?=F)I='-?<V"
"=A9'9A;F-E9 &1B;%]O=G)D7W-G861V86YC960 &-O<F5?9V5N97)A=&EO;E]S9V%D=F%N8V5D &-O<F5?9V5N"
"97)A=&EO;@ ')U;E]C;W)E9V5N7W-G861V86YC960 ')U;E]C;W)E9V5N &1E<'"
")E8V%T961?8V]N=')O;%]S9V%D=F%N8V5D &5V86Q?9FEE;&0 &AA<U]A9'9A;F-E9%]C;VYT<F]L "
" '-G9W5I7W!O<P &)L;V-K7W1Y<&4 &)L;V-K7W9E<G-I;VX "
" '-G7VEC;VY?<W1A= '-G7VUA<VM?9&ES<&QA>0 '-G7VQI<W1?8V]N=&5N=', "
" '-G7V)L;V-K9W5I7WAM; &-L;V-K7VQO8P &-R96%T95]I;G1E<F9A8V"
"5?9&]C=6UE;G0 '-Y;G1H97-I<U]L86YG=6%G90 '-Y;G1H7V9I;&4 &EM<&Q?9FEL90 "
" &-E7V-L<@ '!R97-E<G9E7VAI97)A<F-H>0 '!O<W1G96"
"YE<F%T:6]N7V9C;@ '-E='1I;F=S7V9C;@ &YG8U]C;VYF:6< "
" X !( !@ @ $ 4 ( 0 !$ ! ! 1 (%-Y<W1E;2!'96YE<F%T;W( #@"
" #@ & \" 0 !0 @ ! !P $ $ < !V:7)T97@V X ! !@ @ $ "
" 4 ( 0 H ! ! * >&,V=FQX,C0P= X P !@ @ $ 4 ( 0 "
" ( ! ! @ M,P #@ #@ & \" 0 !0 @ ! !0 $ $ 4 !F9C<X- "
"X P !@ @ $ 4 ( ! ! #@ # & \" 0 !0 @"
" ! P $ $ # %A35 . , 8 ( ! % \" 0 0 X "
" ! !@ @ $ 4 ( 0 T ! ! - 0VQO8VL@16YA8FQE<P X \"@ !@ @ "
" $ 4 ( 0 &L ! ! !K 0SHO5&5M<\"]8:6QI;G@@4$-)($5X<')E<W,O<&-I92UV-BUM;#8P-5])4T"
"4Q,E]5<V5R+TUY57-E<DQO9VEC,#8O=&]P7VQE=F5L7S!?4$-)95]5<V5R3&]G:6-?,#=?24Y/551?3$]'24, X P !@ @ $"
" 4 ( ! ! #@ $@ & \" 0 !0 @ ! $0 $ "
" $ !$ !0<F]J96-T($YA=FEG871O<@ . , 8 ( ! % \" 0 0 "
" X ! !@ @ $ 4 ( 0 P ! ! , 6%-4($1E9F%U;'1S X P "
"!@ @ $ 4 ( ! ! #@ $ & \" 0 !0 @ ! #"
" $ $ P !)4T4@1&5F875L=', #@ # & \" 0 !0 @ $ $ "
" . , 8 ( ! % \" $ # 0 0 , ;V9F X X !@ @ $ "
" 4 ( 0 @ ! ! ( 55-%4E]#3$L. , 8 ( ! % \" $ ! 0 "
" 0 $ -0 X P !@ @ $ 4 ( ! ! #@ # & \" "
" 0 !0 @ $ $ . , 8 ( ! % \" 0 "
" 0 X P !@ @ $ 4 ( ! ! #@ $@ & \" 0"
" !0 @ ! & $ $ !@ !!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,. , 8 ( ! "
" % \" 0 0 X P !@ @ $ 4 ( 0 , ! ! "
"P!O9F8 #@ # & \" 0 !0 @ $ $ . , 8 ( ! "
" % \" $ ! 0 0 $ , X P !@ @ $ 4 ( 0 $ ! ! 0 "
"P #@ $ & \" 0 !0 @ ! \"P $ $ L M,2PM,2PM,2PM,0 #@ #@ "
"& \" 0 !0 @ ! !@ $ $ 8 !S>7-G96X X P !@ @ $ 4 ("
" ! ! #@ & & \" 0 !0 @ ! +@ $ $ \"X U"
",\"PU,\"PM,2PM,2QT;VME;BQW:&ET92PP+# W-S,T+')I9VAT+\"Q;(%TL6R!= . \" , 8 ( ! % \" $ "
" #7 @ 0 0 UP( &9P<FEN=&8H)R<L)T-/34U%3E0Z(&)E9VEN(&EC;VX@9W)A<&AI8W,G*3L*<&%T8V@H6S @-3 @-3 @,\" P(%"
"TL6S @,\" U,\" U,\" P(%TL6S$@,2 Q(%TI.PIP871C:\"A;,2XV,S<U(#$V+C@Q(#(W+C,Q(#,W+C@Q(#0X+C,Q(#(W+C,Q(#$R+C$S-S4@,2XV"
",S<U(%TL6S,V+C8U-2 S-BXV-34@-#<N,34U(#,V+C8U-2 T-RXQ-34@-#<N,34U(#0W+C$U-2 S-BXV-34@72Q;,\"XY,S,S,S,@,\"XR,#,Y,C(@"
",\"XQ-#$Q-S8@72D[\"G!A=&-H*%LQ,BXQ,S<U(#(W+C,Q(#$V+C@Q(#$N-C,W-2 Q,BXQ,S<U(%TL6S(V+C$U-2 R-BXQ-34@,S8N-C4U(#,V+C8U"
"-2 R-BXQ-34@72Q;,\"XV.3@P,SD@,\"XP,S$S-S(U(# N,C$Y-C X(%TI.PIP871C:\"A;,2XV,S<U(#$V+C@Q(#(W+C,Q(#$R+C$S-S4@,2XV,S<"
"U(%TL6S$U+C8U-2 Q-2XV-34@,C8N,34U(#(V+C$U-2 Q-2XV-34@72Q;,\"XY,S,S,S,@,\"XR,#,Y,C(@,\"XQ-#$Q-S8@72D[\"G!A=&-H*%LQ,"
"BXQ,S<U(#0X+C,Q(#,W+C@Q(#(W+C,Q(#$V+C@Q(#$N-C,W-2 Q,BXQ,S<U(%TL6S4N,34U(#4N,34U(#$U+C8U-2 U+C$U-2 Q-2XV-34@,34N-C4"
"U(#4N,34U(%TL6S N-CDX,#,Y(# N,#,Q,S<R-2 P+C(Q.38P.\"!=*3L*9G!R:6YT9B@G)RPG0T]-345.5#H@96YD(&EC;VX@9W)A<&AI8W,G*3L*"
"9G!R:6YT9B@G)RPG0T]-345.5#H@8F5G:6X@:6-O;B!T97AT)RD[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N('1E>'0G*3L #@ # "
" & \" 0 !0 @ $ $ . , 8 ( ! % \" "
" 0 0 X P !@ @ $ 4 ( ! ! #@ # "
" & \" 0 !0 @ ! P $ $ # &]F9@ . , 8 ( ! % \" $ "
" $ 0 0 0 5DA$3 X ! !@ @ $ 4 ( 0 T ! ! - 6%-4($1E9F%U"
";'1S*@ X ! !@ @ $ 4 ( 0 T ! ! - 25-%($1E9F%U;'1S*@ X X "
" !@ @ & 4 ( 0 $ ! D ( . . 8 ( !@ % "
"\" $ ! 0 ) \" #@ $@ & \" 0 !0 @ ! $P $ "
" $ !, !X;$Y'0U!O<W1'96YE<F%T:6]N . 0 8 ( ! % \" $ - 0 0 "
"#0 'AL;F=C<V5T=&EN9W, . Z 8 ( @ % \" $ ! 0 % 0 %0 $ J :"
"6YC;'5D95]C;&]C:W=R87!P97( :6YC;'5D95]C9@ #@ #@ & \" 8 !0 @ ! 0"
" $ \"0 @ #P/PX X !@ @ & 4 ( 0 $ ! D ( "
" . R$( 8 ( @ % \" $ ! 0 % 0 # $ 8 <VAA<F5D 8V]M"
"<&EL871I;VX #@ .@$ & \" ( !0 @ ! 0 $ !0 $ !, ! F &-O;7!I;&%T:6]N "
" !C;VUP:6QA=&EO;E]L=70 <VEM=6QI;FM?<&5R:6]D &EN8W)?;F5T;&ES= !T<FEM7W9B:71S 9&)"
"L7V]V<F0 &1E<')E8V%T961?8V]N=')O; !B;&]C:U]I8V]N7V1I<W!L87D #@ #@ & \" 0 !0 @ "
" ! !P $ $ < !T87)G970S X ! @ !@ @ \" 4 ( 0 $ ! 4 !"
" ' 0 X !K97ES =F%L=65S #@ ! & \" $ !0 @ ! P $ #@ $ "
" & \" 0 !0 @ ! \"P $ $ L !(1$P@3F5T;&ES= #@ $ & \" 0 "
" !0 @ ! \"0 $ $ D !\":71S=')E86T #@ $ & \" 0 !0 @ "
" ! \"P $ $ L !.1T,@3F5T;&ES= #@ .@ & \" $ !0 @ ! P $ "
" #@ #@ & \" 0 !0 @ ! !P $ $ < !T87)G970Q X X !@ @ "
" $ 4 ( 0 < ! ! ' =&%R9V5T,@ . . 8 ( ! % \" $ "
" ' 0 0 !P '1A<F=E=#, #@ #@ & \" 0 !0 @ ! !P $ $ < !"
"00TE%7U13 X P !@ @ $ 4 ( 0 , ! ! P!O9F8 #@ $@ & \" 0 "
" !0 @ ! %P $ $ !< !%=F5R>7=H97)E(&EN(%-U8E-Y<W1E;0 . 2 8 ( ! % "
" \" $ 8 0 0 & $%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<PX P !@ @ $ 4 ( "
" 0 , ! ! P!O9F8 #@ #@ & \" 0 !0 @ ! !P $ $ < !$969"
"A=6QT X \" /0 !@ @ \" 4 ( 0 $ ! 4 ! ( 0 !@ !T87)G970Q '1A<F=E=#("
" =&%R9V5T,P . <!, 8 ( @ % \" $ ! 0 % 0 '@ $ H!0 :6YF;V5D:70 "
" >&EL:6YX9F%M:6QY <&%R= <W!E960 "
" <&%C:V%G90 <WEN=&AE<VES7W1O;VQ?<V=A9'9A;F-E9 <WEN"
"=&AE<VES7W1O;VP 8VQO8VM?=W)A<'!E<E]S9V%D=F%N8V5D 8VQO8VM?=W)A<'!E<@ "
" 9&ER96-T;W)Y <')O:E]T>7!E7W-G861V86YC960 <')O:E]T>7!E "
" 4WEN=&A?9FEL95]S9V%D=F%N8V5D 4WEN=&A?9FEL90 26UP;%]F:6QE7W-G861V86YC96"
"0 26UP;%]F:6QE =&5S=&)E;F-H7W-G861V86YC960 =&5S=&)E;F-H "
" <WES8VQK7W!E<FEO9 9&-M7VEN<'5T7V-L;V-K7W!E<FEO9 :6YC<E]N971L:7"
"-T7W-G861V86YC960 =')I;5]V8FET<U]S9V%D=F%N8V5D 9&)L7V]V<F1?<V=A9'9A;F-E9 8V]R95]G"
"96YE<F%T:6]N7W-G861V86YC960 8V]R95]G96YE<F%T:6]N <G5N7V-O<F5G96Y?<V=A9'9A;F-E9 <G"
"5N7V-O<F5G96X 9&5P<F5C871E9%]C;VYT<F]L7W-G861V86YC960 979A;%]F:65L9 "
" :&%S7V%D=F%N8V5D7V-O;G1R;VP <V=G=6E?<&]S 8FQO8VM?='EP90 "
" 8FQO8VM?=F5R<VEO;@ <V=?:6-O;E]S=&%T <V=?;6%S:U]D:7-P;&%Y "
" <V=?;&ES=%]C;VYT96YT<P <V=?8FQO8VMG=6E?>&UL 8VQO8VM?;&]C "
" 8W)E871E7VEN=&5R9F%C95]D;V-U;65N= <WEN=&AE<VES7VQA;F=U86=E <WEN=&A?9FEL"
"90 :6UP;%]F:6QE 8V5?8VQR <')E<V"
"5R=F5?:&EE<F%R8VAY #@ $@ & \" 0 !0 @ ! $0 $ $ !$ @4WE"
"S=&5M($=E;F5R871O<@ . . 8 ( ! % \" $ ' 0 0 !P '9I<G1E>#8 "
"#@ $ & \" 0 !0 @ ! \"@ $ $ H !X8S9V;'@R-#!T #@ # & "
"\" 0 !0 @ ! @ $ $ \" \"TS . . 8 ( ! % \" $ % "
" 0 0 !0 &9F-S@T #@ # & \" 0 !0 @ $ $ . "
" , 8 ( ! % \" $ # 0 0 , 6%-4 X P !@ @ $ 4 ( "
" ! ! #@ $@ & \" 0 !0 @ ! $@ $ $ !( !%>'!O<"
"V4@0VQO8VL@4&]R=', . J 8 ( ! % \" $ !T 0 0 = $,Z+U1E;7 O6&"
"EL:6YX(%!#22!%>'!R97-S+W!C:64M=C8M;6PV,#5?25-%,3)?57-E<B]->55S97),;V=I8TUU;'1I5&EM:6YG+W1O<%]L979E;%\\P7U!#265?57-"
"E<DQO9VEC7S S7TE.3U547TQ/1TE# X P !@ @ $ 4 ( ! ! #@ "
"$@ & \" 0 !0 @ ! $0 $ $ !$ !0<F]J96-T($YA=FEG871O<@ . , "
"8 ( ! % \" 0 0 X ! !@ @ $ 4 ( 0 P"
" ! ! , 6%-4($1E9F%U;'1S X P !@ @ $ 4 ( ! ! "
" #@ $ & \" 0 !0 @ ! # $ $ P !)4T4@1&5F875L=', #@ # "
" & \" 0 !0 @ $ $ . , 8 ( ! % \" $ "
" # 0 0 , ;V9F X X !@ @ $ 4 ( 0 @ ! ! ( 4$-)15]#3$L."
" , 8 ( ! % \" $ ! 0 0 $ -0 X P !@ @ $ 4 ( "
" ! ! #@ # & \" 0 !0 @ $ $ . "
" , 8 ( ! % \" 0 0 X P !@ @ $ 4 ( "
" ! ! #@ $@ & \" 0 !0 @ ! & $ $ !@ !!8V-O"
"<F1I;F<@=&\\@0FQO8VL@36%S:W,. , 8 ( ! % \" 0 0 X P "
"!@ @ $ 4 ( 0 , ! ! P!O9F8 #@ # & \" 0 !0 @ "
" $ $ . , 8 ( ! % \" $ ! 0 0 $ , X P !@"
" @ $ 4 ( 0 $ ! ! 0 P #@ $ & \" 0 !0 @ ! \"P"
" $ $ L M,2PM,2PM,2PM,0 #@ #@ & \" 0 !0 @ ! !@ $ $ "
" 8 !S>7-G96X X P !@ @ $ 4 ( ! ! #@ & & \" "
" 0 !0 @ ! +@ $ $ \"X U,\"PU,\"PM,2PM,2QT;VME;BQW:&ET92PP+# W-S,T+')I9VAT+\"Q;(%"
"TL6R!= . \" , 8 ( ! % \" $ #7 @ 0 0 UP( &9P<FEN=&8H)R<L)T-/34U%3E0Z(&"
")E9VEN(&EC;VX@9W)A<&AI8W,G*3L*<&%T8V@H6S @-3 @-3 @,\" P(%TL6S @,\" U,\" U,\" P(%TL6S$@,2 Q(%TI.PIP871C:\"A;,2XV,S<"
"U(#$V+C@Q(#(W+C,Q(#,W+C@Q(#0X+C,Q(#(W+C,Q(#$R+C$S-S4@,2XV,S<U(%TL6S,V+C8U-2 S-BXV-34@-#<N,34U(#,V+C8U-2 T-RXQ-34@-"
"#<N,34U(#0W+C$U-2 S-BXV-34@72Q;,\"XY,S,S,S,@,\"XR,#,Y,C(@,\"XQ-#$Q-S8@72D[\"G!A=&-H*%LQ,BXQ,S<U(#(W+C,Q(#$V+C@Q(#$"
"N-C,W-2 Q,BXQ,S<U(%TL6S(V+C$U-2 R-BXQ-34@,S8N-C4U(#,V+C8U-2 R-BXQ-34@72Q;,\"XV.3@P,SD@,\"XP,S$S-S(U(# N,C$Y-C X(%T"
"I.PIP871C:\"A;,2XV,S<U(#$V+C@Q(#(W+C,Q(#$R+C$S-S4@,2XV,S<U(%TL6S$U+C8U-2 Q-2XV-34@,C8N,34U(#(V+C$U-2 Q-2XV-34@72Q;"
",\"XY,S,S,S,@,\"XR,#,Y,C(@,\"XQ-#$Q-S8@72D[\"G!A=&-H*%LQ,BXQ,S<U(#0X+C,Q(#,W+C@Q(#(W+C,Q(#$V+C@Q(#$N-C,W-2 Q,BXQ,S"
"<U(%TL6S4N,34U(#4N,34U(#$U+C8U-2 U+C$U-2 Q-2XV-34@,34N-C4U(#4N,34U(%TL6S N-CDX,#,Y(# N,#,Q,S<R-2 P+C(Q.38P.\"!=*3L"
"*9G!R:6YT9B@G)RPG0T]-345.5#H@96YD(&EC;VX@9W)A<&AI8W,G*3L*9G!R:6YT9B@G)RPG0T]-345.5#H@8F5G:6X@:6-O;B!T97AT)RD[\"F9P"
"<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N('1E>'0G*3L #@ # & \" 0 !0 @ $ "
"$ . , 8 ( ! % \" 0 0 X P !@ @ $ "
" 4 ( ! ! #@ # & \" 0 !0 @ ! P $ $ "
" # &]F9@ . , 8 ( ! % \" $ $ 0 0 0 5DA$3 X ! !@ @ $ "
" 4 ( 0 T ! ! - 6%-4($1E9F%U;'1S*@ X ! !@ @ $ 4 ( 0 "
" T ! ! - 25-%($1E9F%U;'1S*@ X X !@ @ & 4 ( 0 $ ! D"
" ( . . 8 ( !@ % \" $ ! 0 ) \" #@ & "
"4 & \" ( !0 @ ! 0 $ !0 $ !X ! @@4 &EN9F]E9&ET "
" 'AI;&EN>&9A;6EL>0 '!A<G0 '-P965D "
" '!A8VMA9V4 '-Y;G1H97-I<U]T;V]L7W-G861V86YC960 '-Y;G1H97-I<U]T;V]L "
" &-L;V-K7W=R87!P97)?<V=A9'9A;F-E9 &-L;V-K7W=R87!P97( &1I<F5C=&]R>0 "
" '!R;VI?='EP95]S9V%D=F%N8V5D '!R;VI?='EP90 %-Y;G1H7V9I"
";&5?<V=A9'9A;F-E9 %-Y;G1H7V9I;&4 $EM<&Q?9FEL95]S9V%D=F%N8V5D $EM<&"
"Q?9FEL90 '1E<W1B96YC:%]S9V%D=F%N8V5D '1E<W1B96YC: "
" '-Y<V-L:U]P97)I;V0 &1C;5]I;G!U=%]C;&]C:U]P97)I;V0 &EN8W)?;F5T;&ES=%]S9V%D=F%N8V5D "
" '1R:6U?=F)I='-?<V=A9'9A;F-E9 &1B;%]O=G)D7W-G861V86YC960 &-O<F5?9V5N97)A=&EO;E]S9V%D"
"=F%N8V5D &-O<F5?9V5N97)A=&EO;@ ')U;E]C;W)E9V5N7W-G861V86YC960 ')U;E]C;W)E9V5N "
" &1E<')E8V%T961?8V]N=')O;%]S9V%D=F%N8V5D &5V86Q?9FEE;&0 &AA<U]A9'9A;F-E"
"9%]C;VYT<F]L '-G9W5I7W!O<P &)L;V-K7W1Y<&4 &)L;V-K7W"
"9E<G-I;VX '-G7VEC;VY?<W1A= '-G7VUA<VM?9&ES<&QA>0 '-G"
"7VQI<W1?8V]N=&5N=', '-G7V)L;V-K9W5I7WAM; &-L;V-K7VQO8P "
" &-R96%T95]I;G1E<F9A8V5?9&]C=6UE;G0 '-Y;G1H97-I<U]L86YG=6%G90 '-Y;G1H7V9I;&4 "
" &EM<&Q?9FEL90 &-E7V-L<@ '!R97-E<G9E7VAI97)A<F-H>0"
" '9E<G-I;VX '!O<W1G96YE<F%T:6]N7V9C;@ '-E='1I;F=S7V9C;@ "
" X !( !@ @ $ 4 ( 0 !$ ! ! 1 (%-Y<W1E;2"
"!'96YE<F%T;W( #@ #@ & \" 0 !0 @ ! \" $ $ @ !S<&%R=&%N-@X "
"! !@ @ $ 4 ( 0 D ! ! ) >&,V<VQX-#5T X P !@ @ $"
" 4 ( 0 ( ! ! @ M,P #@ #@ & \" 0 !0 @ ! !@ $ "
" $ 8 !F9V<T.#0 X P !@ @ $ 4 ( ! ! #@ # & "
" \" 0 !0 @ ! P $ $ # %A35 . , 8 ( ! % \" "
" 0 0 X ! !@ @ $ 4 ( 0 T ! ! - 0VQO8VL@16YA8FQE<"
"P X !8 !@ @ $ 4 ( 0 \"8 ! ! F 0SHO5&5M<\"]8:6QI;GA-24<O4WES1V5N+"
"U-Y<T=E;E]\"251?,#$ X P !@ @ $ 4 ( ! ! #@ $@ & \""
" 0 !0 @ ! $0 $ $ !$ !0<F]J96-T($YA=FEG871O<@ . , 8 ( ! "
" % \" 0 0 X ! !@ @ $ 4 ( 0 P ! "
" ! , 6%-4($1E9F%U;'1S X P !@ @ $ 4 ( ! ! #@ $"
" & \" 0 !0 @ ! # $ $ P !)4T4@1&5F875L=', #@ # & \" "
"0 !0 @ $ $ . , 8 ( ! % \" $ # 0 "
" 0 , ;V9F X ! !@ @ $ 4 ( 0 D ! ! ) 4U V,#5?0TQ+ X "
" P !@ @ $ 4 ( 0 ( ! ! @ Q, #@ # & \" 0 !0 @ "
" $ $ . , 8 ( ! % \" 0 0 X "
"P !@ @ $ 4 ( ! ! #@ # & \" 0 !0 @ "
" $ $ . 2 8 ( ! % \" $ 8 0 0 & $%C8V]R9"
"&EN9R!T;R!\";&]C:R!-87-K<PX P !@ @ $ 4 ( ! ! #@ # & "
" \" 0 !0 @ ! P $ $ # &]F9@ . , 8 ( ! % \" "
" 0 0 X P !@ @ $ 4 ( 0 $ ! ! 0 P #@ # & "
"\" 0 !0 @ ! 0 $ $ ! # . 0 8 ( ! % \" $ + "
" 0 0 \"P \"TQ+\"TQ+\"TQ+\"TQ . . 8 ( ! % \" $ & 0 0"
" !@ '-Y<V=E;@ #@ # & \" 0 !0 @ $ $ . 8 8 ( "
" ! % \" $ N 0 0 +@ #4P+#4P+\"TQ+\"TQ+'1O:V5N+'=H:71E+# L,#<W,S0L<FEG:'0L+%L@"
"72Q;(%T X ( P !@ @ $ 4 ( 0 -<\" ! ! #7 @ 9G!R:6YT9B@G)RPG0T]-345.5#H@8"
"F5G:6X@:6-O;B!G<F%P:&EC<R<I.PIP871C:\"A;,\" U,\" U,\" P(# @72Q;,\" P(#4P(#4P(# @72Q;,2 Q(#$@72D[\"G!A=&-H*%LQ+C8S-"
"S4@,38N.#$@,C<N,S$@,S<N.#$@-#@N,S$@,C<N,S$@,3(N,3,W-2 Q+C8S-S4@72Q;,S8N-C4U(#,V+C8U-2 T-RXQ-34@,S8N-C4U(#0W+C$U-2 "
"T-RXQ-34@-#<N,34U(#,V+C8U-2!=+%LP+CDS,S,S,R P+C(P,SDR,B P+C$T,3$W-B!=*3L*<&%T8V@H6S$R+C$S-S4@,C<N,S$@,38N.#$@,2XV,"
"S<U(#$R+C$S-S4@72Q;,C8N,34U(#(V+C$U-2 S-BXV-34@,S8N-C4U(#(V+C$U-2!=+%LP+C8Y.# S.2 P+C S,3,W,C4@,\"XR,3DV,#@@72D[\""
"G!A=&-H*%LQ+C8S-S4@,38N.#$@,C<N,S$@,3(N,3,W-2 Q+C8S-S4@72Q;,34N-C4U(#$U+C8U-2 R-BXQ-34@,C8N,34U(#$U+C8U-2!=+%LP+CD"
"S,S,S,R P+C(P,SDR,B P+C$T,3$W-B!=*3L*<&%T8V@H6S$R+C$S-S4@-#@N,S$@,S<N.#$@,C<N,S$@,38N.#$@,2XV,S<U(#$R+C$S-S4@72Q;-"
"2XQ-34@-2XQ-34@,34N-C4U(#4N,34U(#$U+C8U-2 Q-2XV-34@-2XQ-34@72Q;,\"XV.3@P,SD@,\"XP,S$S-S(U(# N,C$Y-C X(%TI.PIF<')I;"
"G1F*\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!G<F%P:&EC<R<I.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N('1E>'0G*3L*9G!R:6Y"
"T9B@G)RPG0T]-345.5#H@96YD(&EC;VX@=&5X=\"<I.P . , 8 ( ! % \" 0 0 "
" X P !@ @ $ 4 ( ! ! #@ # & \" 0 "
"!0 @ $ $ . , 8 ( ! % \" $ # 0 0 , ;"
"V9F X P !@ @ $ 4 ( 0 0 ! ! ! !62$1,#@ $ & \" 0 !0"
" @ ! #0 $ $ T !84U0@1&5F875L=',J #@ $ & \" 0 !0 @ ! #0 "
" $ $ T !)4T4@1&5F875L=',J #@ #@ & \" 8 !0 @ ! 0 $ \"0 "
" @ X X !@ @ & 4 ( 0 $ ! D ( . , "
" 8 ( ! % \" $ $ 0 0 0 ,3$N,@X !0 !@ @ $ 4 ( 0 !"
"D ! ! 9 >&Q\":71S=')E86U0;W-T1V5N97)A=&EO;@ . 2 8 ( ! % \" "
"$ 4 0 0 % 'AL5&]P3&5V96Q.971L:7-T1U5) X !(%0 !@ @ \" 4 ( 0 $"
" ! 4 ! > 0 ((% !I;F9O961I= !X:6QI;GAF86UI;'D "
" !P87)T !S<&5E9 !P86-K86=E "
" !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT:&5S:7-?=&]O; !C;&]C:U]W<F%P<&5R7W-G861V8"
"6YC960 !C;&]C:U]W<F%P<&5R !D:7)E8W1O<GD !P<F]J7W1Y<&5?<V=A9'9"
"A;F-E9 !P<F]J7W1Y<&4 !3>6YT:%]F:6QE7W-G861V86YC960 !3>6YT:%]F:6QE "
" !);7!L7V9I;&5?<V=A9'9A;F-E9 !);7!L7V9I;&4 !T97-T8F5"
"N8VA?<V=A9'9A;F-E9 !T97-T8F5N8V@ !S>7-C;&M?<&5R:6]D !D8"
"VU?:6YP=71?8VQO8VM?<&5R:6]D !I;F-R7VYE=&QI<W1?<V=A9'9A;F-E9 !T<FEM7W9B:71S7W-G861V86YC960 "
" !D8FQ?;W9R9%]S9V%D=F%N8V5D !C;W)E7V=E;F5R871I;VY?<V=A9'9A;F-E9 !C;W)E7V=E;F5R871I;VX "
" !R=6Y?8V]R96=E;E]S9V%D=F%N8V5D !R=6Y?8V]R96=E;@ !D97!R96-A=&5D7V-O;G1R;VQ"
"?<V=A9'9A;F-E9 !E=F%L7V9I96QD !H87-?861V86YC961?8V]N=')O; !S9V=U:5]P;W, "
" !B;&]C:U]T>7!E !B;&]C:U]V97)S:6]N !S9U]I8V]N7W-"
"T870 !S9U]M87-K7V1I<W!L87D !S9U]L:7-T7V-O;G1E;G1S !S9U]B;"
"&]C:V=U:5]X;6P !C;&]C:U]L;V, !C<F5A=&5?:6YT97)F86-E7V1O8W5M96YT !"
"S>6YT:&5S:7-?;&%N9W5A9V4 !S>6YT:%]F:6QE !I;7!L7V9I;&4 "
" !C95]C;'( !P<F5S97)V95]H:65R87)C:'D !P;W-T9V5N97)A=&EO;E]F8VX "
" !S971T:6YG<U]F8VX !N9V-?8V]N9FEG . 2 8 "
" ( ! % \" $ 1 0 0 $0 \"!3>7-T96T@1V5N97)A=&]R X X !@ @ "
" $ 4 ( 0 < ! ! ' =FER=&5X-@ . 0 8 ( ! % \" $ "
" * 0 0 \"@ 'AC-G9L>#(T,'0 . , 8 ( ! % \" $ \" 0 "
" 0 ( +3, X X !@ @ $ 4 ( 0 4 ! ! % 9F8W.#0 . , 8 "
"( ! % \" 0 0 X P !@ @ $ 4 ( 0 , !"
" ! P!84U0 #@ # & \" 0 !0 @ $ $ . 0 8 ( "
" ! % \" $ - 0 0 #0 $-L;V-K($5N86)L97, . H 8 ( ! % "
" \" $ !K 0 0 :P $,Z+U1E;7 O6&EL:6YX(%!#22!%>'!R97-S+W!C:64M=C8M;6PV,#5?25-%,3)?57-E<B]->55"
"S97),;V=I8S V+W1O<%]L979E;%\\P7U!#265?57-E<DQO9VEC7S W7TE.3U547TQ/1TE# . , 8 ( ! % "
"\" 0 0 X !( !@ @ $ 4 ( 0 !$ ! ! 1 4"
"')O:F5C=\"!.879I9V%T;W( #@ # & \" 0 !0 @ $ $ . 0"
" 8 ( ! % \" $ , 0 0 # %A35\"!$969A=6QT<P . , 8 ( !"
" % \" 0 0 X ! !@ @ $ 4 ( 0 P ! "
" ! , 25-%($1E9F%U;'1S X P !@ @ $ 4 ( ! ! #@ "
" # & \" 0 !0 @ ! P $ $ # &]F9@ . . 8 ( ! % \" "
" $ ( 0 0 \" %5315)?0TQ+#@ # & \" 0 !0 @ ! 0 $ $ !"
" #4 . , 8 ( ! % \" 0 0 X P !@ @ $ "
" 4 ( ! ! #@ # & \" 0 !0 @ $ $ "
" . , 8 ( ! % \" 0 0 X !( !@ @ $ 4"
" ( 0 !@ ! ! 8 06-C;W)D:6YG('1O($)L;V-K($UA<VMS#@ # & \" 0 !0 @ "
" $ $ . , 8 ( ! % \" $ # 0 0 , ;V9F X "
" P !@ @ $ 4 ( ! ! #@ # & \" 0 !0 @ "
" ! 0 $ $ ! # . , 8 ( ! % \" $ ! 0 0 $ , X !"
" !@ @ $ 4 ( 0 L ! ! + +3$L+3$L+3$L+3$ X X !@ @ $ "
" 4 ( 0 8 ! ! & <WES9V5N . , 8 ( ! % \" "
" 0 0 X !@ !@ @ $ 4 ( 0 \"X ! ! N -3 L-3 L+3$L+3$"
"L=&]K96XL=VAI=&4L,\"PP-S<S-\"QR:6=H=\"PL6R!=+%L@70 #@ @# & \" 0 !0 @ ! UP( $ "
" $ -<\" !F<')I;G1F*\"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N(&=R87!H:6-S)RD[\"G!A=&-H*%LP(#4P(#4P(# @,\"!=+%LP(# @-3"
" @-3 @,\"!=+%LQ(#$@,2!=*3L*<&%T8V@H6S$N-C,W-2 Q-BXX,2 R-RXS,2 S-RXX,2 T.\"XS,2 R-RXS,2 Q,BXQ,S<U(#$N-C,W-2!=+%LS-B"
"XV-34@,S8N-C4U(#0W+C$U-2 S-BXV-34@-#<N,34U(#0W+C$U-2 T-RXQ-34@,S8N-C4U(%TL6S N.3,S,S,S(# N,C S.3(R(# N,30Q,3<V(%TI"
".PIP871C:\"A;,3(N,3,W-2 R-RXS,2 Q-BXX,2 Q+C8S-S4@,3(N,3,W-2!=+%LR-BXQ-34@,C8N,34U(#,V+C8U-2 S-BXV-34@,C8N,34U(%TL6"
"S N-CDX,#,Y(# N,#,Q,S<R-2 P+C(Q.38P.\"!=*3L*<&%T8V@H6S$N-C,W-2 Q-BXX,2 R-RXS,2 Q,BXQ,S<U(#$N-C,W-2!=+%LQ-2XV-34@,3"
"4N-C4U(#(V+C$U-2 R-BXQ-34@,34N-C4U(%TL6S N.3,S,S,S(# N,C S.3(R(# N,30Q,3<V(%TI.PIP871C:\"A;,3(N,3,W-2 T.\"XS,2 S-R"
"XX,2 R-RXS,2 Q-BXX,2 Q+C8S-S4@,3(N,3,W-2!=+%LU+C$U-2 U+C$U-2 Q-2XV-34@-2XQ-34@,34N-C4U(#$U+C8U-2 U+C$U-2!=+%LP+C8Y"
".# S.2 P+C S,3,W,C4@,\"XR,3DV,#@@72D[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N(&=R87!H:6-S)RD[\"F9P<FEN=&8H)R<L)T"
"-/34U%3E0Z(&)E9VEN(&EC;VX@=&5X=\"<I.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!T97AT)RD[ X P !@ @ $ "
" 4 ( ! ! #@ # & \" 0 !0 @ $ "
" $ . , 8 ( ! % \" 0 0 X P !@ @ $ "
" 4 ( 0 , ! ! P!O9F8 #@ # & \" 0 !0 @ ! ! $ "
"$ $ %9(1$P. 0 8 ( ! % \" $ - 0 0 #0 %A35\"!$969A=6QT<RH . "
"0 8 ( ! % \" $ - 0 0 #0 $E312!$969A=6QT<RH . . 8 ( !"
"@ % \" $ ! 0 ) \" #@ #@ & \" 8 !0 @ ! "
" 0 $ \"0 @ X !( !@ @ $ 4 ( 0 !, ! ! 3 >"
"&Q.1T-0;W-T1V5N97)A=&EO;@ #@ $ & \" 0 !0 @ ! #0 $ $ T !X;&YG8W"
"-E='1I;F=S #@ .@ & \" ( !0 @ ! 0 $ !0 $ !4 ! *@ &EN8VQU9&5?8VQ"
"O8VMW<F%P<&5R &EN8VQU9&5?8V8 X X !@ @ & 4 ( 0 $ ! "
" D ( \\#\\. . 8 ( !@ % \" $ ! 0 ) \" "
}
}