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[/] [phr/] [branches/] [placas_1.0/] [placas/] [FPGA/] [tmp/] [fpga_2_max.pro] - Rev 113

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update=lun 28 may 2012 22:27:00 ART
last_client=pcbnew
[pcbnew]
version=1
PadDrlX=320
PadDimH=600
PadDimV=600
BoardThickness=630
RouteTo=15
RouteBo=0
Segm45=1
Racc45=1
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
VEgarde=100
DrawLar=150
EdgeLar=150
TxtLar=120
MSegLar=150
WpenSer=10
[pcbnew/libraries]
LibDir=
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms
LibName7=display
LibName8=valves
LibName9=led
LibName10=dip_sockets
LibName11=libreria/w_smd_dil
LibName12=libreria/XCF01S-VO20

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