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\documentclass[portrait,a0paper,fontscale=0.260]{baposter}
 
\usepackage [utf8] {inputenc}
\usepackage [spanish] {babel}
 
\usepackage{times}
\usepackage{graphicx}
\graphicspath{{images/}}
 
\usepackage{multicol}
 
%\definecolor{lightBlue}{rgb}{0.834,0.836,0.838}
\definecolor{lightBlue}{rgb}{1,1,1}
\definecolor{darkBlue}{rgb}{0.055,0.59,1}
 
%\definecolor{lightBlue}{rgb}{0.55,0.55,0.9}
%\definecolor{darkBlue}{rgb}{0.085,0.085,0.312}
\definecolor{lightBG}{rgb}{1,1,1}
\definecolor{darkBG}{rgb}{0.8,0.8,0.8}
 
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 % Save space in lists. Use this after the opening of the list
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 \newcommand{\compresslist}{%
 \setlength{\itemsep}{0pt}%
 \setlength{\parskip}{0pt}%
 \setlength{\parsep}{0pt}%
 }
 
\begin{document}
 
\begin{poster}{
 grid=false,
 columns=6,
 % Column spacing
 colspacing=0.7em,
 % Color style
 headerColorOne=cyan!20!white!90!black,
 borderColor=black,
 % Format of textbox
 textborder=roundedleft,
boxColorOne=white,
linewidth=1.5pt,
 % Format of text header
headerborder=open,
headershape=roundedright,
headershade=shadeTB,
headerColorOne=darkBlue,
headerColorTwo=lightBlue,
headerfont=\large\sffamily\textbf, 
headerFontColor=black,
background=plain, %shadeTD
bgColorOne=lightBG,
bgColorTwo=darkBG,
headerheight=0.12\textheight,
eyecatcher=false
}
{ % Poster eye catcher (top-left logo)
 Eye Catcher, empty if option eyecatcher=no
}
{ %Poster title
 \huge \sffamily Plataforma de Hardware Reconfigurable
}
{ % poster Authors
 \large{\\[0.5ex]
 Luis Alberto Guanuco (lguanuco@electronica.frc.utn.edu.ar)\\
 Sergio Daniel Olmedo (solmedo@scdt.frc.utn.edu.ar)\\
 Alexis Maximiliano Quinteros (50214@electronica.frc.utn.edu.ar)}
}
{ % University logo (top-right logo)
 \begin{tabular}{r}
 \includegraphics[height=0.04\textheight]{CUDARlogo.pdf}\\
 \includegraphics[height=0.035\textheight]{UTNlogo.pdf}
 \end{tabular}
}
 
 
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%%% Now define the boxes that make up the poster
%%%---------------------------------------------------------------------------
%%% Each box has a name and can be placed absolutely or relatively.
%%% The only inconvenience is that you can only specify a relative position 
%%% towards an already declared box. So if you have a box attached to the 
%%% bottom, one to the top and a third one which should be inbetween, you 
%%% have to specify the top and bottom boxes before you specify the middle 
%%% box.
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  \headerbox{Introducción} {name=contribution,column=0,row=0,span=3}{
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El proyecto Plataforma de Hardware Reconfigurable tiene como objetivo principal desarrollar recursos académicos para la difusión y actualización tecnológica relacionado al área digital a través de Dispositivos Lógicos Programables (PLDs).
 
El desarrollo comprende el diseño de hardware y software que se publican bajo licencias libres.
 
  }
 
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  \headerbox{Características de la PHR}{name=dos,column=0,below=contribution, span=3}{
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\begin{description}
\compresslist
\item [FPGA:] Xilinx Spartan-3A XC3S200A (encapsulado VQG100).
\item [Memoria PROM:] Xilinx XCF02S.
\item [Voltaje de entrada:] 5V.
\item [Relojes:] Un reloj fijo y tres seleccionables:
	\begin{description}
	\compresslist
	\item [Clock 0:] 50 MHz.
	\item [Clock 1:] 16 MHz, 1 MHz, 500 kHz y 250 kHz.
	\item [Clock 2:] 125 kHz, 62.5 kHz, 31.25 kHz, 15.625 kHz.
	\item [Clock 3:] 3.9062 kHz, 1.9531 kHz, 976,56251 Hz.
   \end{description}
\item [Conectores con E/S de propósito general:] 28 pines en total.
\item [Periféricos:] 8 LEDs, 8 llaves (DIP switch), 4 pulsadores, Display de 7 segmentos cuádruple, Puerto serie.
 
\end{description}
}
 
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  \headerbox{Diagrama de bloques}{name=tres,column=3,row=0,span=3}{
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\begin{center}
\includegraphics[width=0.95\textwidth]{block.pdf}
\end{center}
}
 
 
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   \headerbox{Placas del proyecto}{name=diez,column=0,below=dos,span=4}{
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\begin{center}
\includegraphics[height=0.25\textwidth]{phr.png}\hspace{2em}
\includegraphics[height=0.25\textwidth]{phr_top.png}
\end{center}
 
    La \emph{Plataforma de Hardware Reconfigurable} consiste fundamentalmente en tres módulos
de soporte físico. El módulo principal es la placa PHR donde se encuentran el chip FPGA, relojes,
interfaces de entradas y salidas, periféricos (tales como LEDs, botones, llaves DIP, Displays de siete
segmentos), etc. Además tiene conectores especiales para otros dos módulos sin los cuales la placa principal carece de funcionalidad.
 
 
\begin{multicols}{2}
\begin{center}
\includegraphics[width=0.35\textwidth]{s3power.png}
\end{center}
 
Para cumplir con las especificaciones se utiliza la placa S3Power, que fue desarrollada por el Instituto Nacional de Tecnología Industrial (INTI) y que está disponible bajo licencia GNU. 
 
La función de la placa S3Power la realiza principalmente el chip TPS75003 el cuál tiene un regulador lineal y controladores para dos fuentes conmutadas, lo cual permite suministrar energía regulada con tres valores de tensión y distintas características de arranque. Los voltajes utilizados por la FPGA son de 1.2V, 2.5V y 3.3V.
 
 
\columnbreak
 
\begin{center}
\includegraphics[width=0.44\textwidth]{oocdlink.png}
\end{center}
 
Esta placa es la interfaz que permite la comunicación entre una computadora y la placa PHR. Su característica modular, o de circuito separado de la placa PHR principal, hace que su utilización no quede restringida a la FPGA y posibilita la interacción con los multiples dispositivos que soportan JTAG.
 
La placa OOCD Link incluye el chip FT2232D que establece una interfaz JTAG controlable mediante una conexión USB.
 
 
\end{multicols}
 
   }
 
 
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  \headerbox{Configuración de la FPGA}{name=trece,column=4,below=dos, span=2}{
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\begin{center}
\includegraphics[width=.9\textwidth]{front-end.pdf}
\end{center}
 
Para transferir el diseño del usuario a la FPGA, PHR se sirve de las funciones de xc3sprog, un conjunto de aplicaciones de licencia libre que funciona en linea de comandos y que puede programar varios dispositivos mediante JTAG. 
 
No obstante su funcionalidad, xc3sprog puede resultar no intuitivo para el usuario principiante,
por lo que se ofrece una interfaz gráfica denominada PHR GUI para invocar a xc3sprog de una manera muy simple.
 
}
 
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  \headerbox{Referencias}{name=ref,column=4,below=trece, span=2}{
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References.
 
}
 
 
\end{poster}
 
\end{document}