OpenCores
URL https://opencores.org/ocsvn/phr/phr/trunk

Subversion Repositories phr

[/] [phr/] [trunk/] [doc/] [informe-tesis/] [reports/] [schedule_2012-08-24/] [schedule.aux] - Rev 444

Go to most recent revision | Compare with Previous | Blame | View Log

\relax 
\catcode`"\active
\catcode`<\active
\catcode`>\active
\@nameuse{es@quoting}
\select@language{spanish}
\@writefile{toc}{\select@language{spanish}}
\@writefile{lof}{\select@language{spanish}}
\@writefile{lot}{\select@language{spanish}}
\@writefile{toc}{\contentsline {section}{\numberline {1}Introducci\IeC {\'o}n}{1}}
\newlabel{sec:intro}{{1}{1}}
\@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces Esquema de trabajo a seguir.\relax }}{1}}
\@writefile{toc}{\contentsline {section}{\numberline {2}Armado}{1}}
\newlabel{sec:armado}{{2}{1}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.1}Placas}{1}}
\newlabel{sec:placas}{{2.1}{1}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.2}Recursos}{1}}
\newlabel{sec:recursos}{{2.2}{1}}
\@writefile{toc}{\contentsline {subsection}{\numberline {2.3}Placas}{2}}
\newlabel{sec:process}{{2.3}{2}}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {2.3.1}OT-CPLD}{2}}
\@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces Esquem\IeC {\'a}tico\relax }}{2}}
\@writefile{lof}{\contentsline {figure}{\numberline {3}{\ignorespaces PCB\relax }}{3}}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {2.3.2}OOCD Links}{4}}
\@writefile{lof}{\contentsline {figure}{\numberline {4}{\ignorespaces Esquem\IeC {\'a}tico\relax }}{4}}
\@writefile{lof}{\contentsline {figure}{\numberline {4}{\ignorespaces Esquem\IeC {\'a}tico (Continuaci\IeC {\'o}n)\relax }}{5}}
\@writefile{lof}{\contentsline {figure}{\numberline {5}{\ignorespaces PCB\relax }}{5}}
\@writefile{lof}{\contentsline {figure}{\numberline {5}{\ignorespaces PCB (Continuaci\IeC {\'o}n)\relax }}{6}}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {2.3.3}S3Power}{6}}
\@writefile{lof}{\contentsline {figure}{\numberline {6}{\ignorespaces Esquem\IeC {\'a}tico\relax }}{6}}
\@writefile{lof}{\contentsline {figure}{\numberline {7}{\ignorespaces PCB\relax }}{7}}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {2.3.4}FPGA (PHR \relax \fontsize  {10}{12}\selectfont  \abovedisplayskip 10\p@ plus2\p@ minus5\p@ \abovedisplayshortskip \z@ plus3\p@ \belowdisplayshortskip 6\p@ plus3\p@ minus3\p@ \def \leftmargin \leftmargini \parsep 4.5\p@ plus2\p@ minus\p@ \topsep 9\p@ plus3\p@ minus5\p@ \itemsep 4.5\p@ plus2\p@ minus\p@ {\leftmargin \leftmargini \topsep 6\p@ plus2\p@ minus2\p@ \parsep 3\p@ plus2\p@ minus\p@ \itemsep \parsep }\belowdisplayskip \abovedisplayskip {version BETA})}{8}}
\@writefile{lof}{\contentsline {figure}{\numberline {8}{\ignorespaces Esquem\IeC {\'a}tico\relax }}{8}}
\@writefile{lof}{\contentsline {figure}{\numberline {8}{\ignorespaces Esquem\IeC {\'a}tico (Continuaci\IeC {\'o}n)\relax }}{9}}
\@writefile{lof}{\contentsline {figure}{\numberline {9}{\ignorespaces PCB\relax }}{9}}
\@writefile{lof}{\contentsline {figure}{\numberline {9}{\ignorespaces PCB (Continuaci\IeC {\'o}n)\relax }}{10}}
\@writefile{toc}{\contentsline {section}{\numberline {3}Documentaci\IeC {\'o}n}{10}}
\@writefile{toc}{\contentsline {section}{\numberline {A}Repositorio de proyecto}{11}}
\@writefile{toc}{\contentsline {section}{\numberline {B}Archivos a conciderar}{11}}
\@writefile{toc}{\contentsline {section}{\numberline {C}Lista de componentes}{12}}
\@writefile{toc}{\contentsline {subsection}{\numberline {C.1}OT-CPLD}{12}}
\@writefile{toc}{\contentsline {subsection}{\numberline {C.2}OOCD Links}{14}}
\@writefile{toc}{\contentsline {subsection}{\numberline {C.3}S3Power}{19}}
\@writefile{toc}{\contentsline {subsection}{\numberline {C.4}FPGA}{23}}

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.