Subversion Repositories phr

 
%% bare_conf.tex
%% V1.3
%% 2007/01/11
%% by Michael Shell
%% See:
%% http://www.michaelshell.org/
%% for current contact information.
%%
%% This is a skeleton file demonstrating the use of IEEEtran.cls
%% (requires IEEEtran.cls version 1.7 or later) with an IEEE conference paper.
%%
%% Support sites:
%% http://www.michaelshell.org/tex/ieeetran/
%% http://www.ctan.org/tex-archive/macros/latex/contrib/IEEEtran/
%% and
%% http://www.ieee.org/
 
%%*************************************************************************
%% Legal Notice:
%% This code is offered as-is without any warranty either expressed or
%% implied; without even the implied warranty of MERCHANTABILITY or
%% FITNESS FOR A PARTICULAR PURPOSE! 
%% User assumes all risk.
%% In no event shall IEEE or any contributor to this code be liable for
%% any damages or losses, including, but not limited to, incidental,
%% consequential, or any other damages, resulting from the use or misuse
%% of any information contained here.
%%
%% All comments are the opinions of their respective authors and are not
%% necessarily endorsed by the IEEE.
%%
%% This work is distributed under the LaTeX Project Public License (LPPL)
%% ( http://www.latex-project.org/ ) version 1.3, and may be freely used,
%% distributed and modified. A copy of the LPPL, version 1.3, is included
%% in the base LaTeX documentation of all distributions of LaTeX released
%% 2003/12/01 or later.
%% Retain all contribution notices and credits.
%% ** Modified files should be clearly indicated as such, including  **
%% ** renaming them and changing author support contact information. **
%%
%% File list of work: IEEEtran.cls, IEEEtran_HOWTO.pdf, bare_adv.tex,
%%                    bare_conf.tex, bare_jrnl.tex, bare_jrnl_compsoc.tex
%%*************************************************************************
 
% *** Authors should verify (and, if needed, correct) their LaTeX system  ***
% *** with the testflow diagnostic prior to trusting their LaTeX platform ***
% *** with production work. IEEE's font choices can trigger bugs that do  ***
% *** not appear when using other class files.                            ***
% The testflow support page is at:
% http://www.michaelshell.org/tex/testflow/
 
 
 
% Note that the a4paper option is mainly intended so that authors in
% countries using A4 can easily print to A4 and see how their papers will
% look in print - the typesetting of the document will not typically be
% affected with changes in paper size (but the bottom and side margins will).
% Use the testflow package mentioned above to verify correct handling of
% both paper sizes by the user's LaTeX system.
%
% Also note that the "draftcls" or "draftclsnofoot", not "draft", option
% should be used if it is desired that the figures are to be displayed in
% draft mode.
%
\documentclass[conference]{IEEEtran}
% Add the compsoc option for Computer Society conferences.
%
% If IEEEtran.cls has not been installed into the LaTeX system files,
% manually specify the path to it like:
% \documentclass[conference]{../sty/IEEEtran}
 
 
% Some very useful LaTeX packages include:
% (uncomment the ones you want to load)
 
 
% *** MISC UTILITY PACKAGES ***
%
%\usepackage{ifpdf}
% Heiko Oberdiek's ifpdf.sty is very useful if you need conditional
% compilation based on whether the output is pdf or dvi.
% usage:
% \ifpdf
%   % pdf code
% \else
%   % dvi code
% \fi
% The latest version of ifpdf.sty can be obtained from:
% http://www.ctan.org/tex-archive/macros/latex/contrib/oberdiek/
% Also, note that IEEEtran.cls V1.7 and later provides a builtin
% \ifCLASSINFOpdf conditional that works the same way.
% When switching from latex to pdflatex and vice-versa, the compiler may
% have to be run twice to clear warning/error messages.
 
 
 
% *** CITATION PACKAGES ***
%
%\usepackage{cite}
% cite.sty was written by Donald Arseneau
% V1.6 and later of IEEEtran pre-defines the format of the cite.sty package
% \cite{} output to follow that of IEEE. Loading the cite package will
% result in citation numbers being automatically sorted and properly
% "compressed/ranged". e.g., [1], [9], [2], [7], [5], [6] without using
% cite.sty will become [1], [2], [5]--[7], [9] using cite.sty. cite.sty's
% \cite will automatically add leading space, if needed. Use cite.sty's
% noadjust option (cite.sty V3.8 and later) if you want to turn this off.
% cite.sty is already installed on most LaTeX systems. Be sure and use
% version 4.0 (2003-05-27) and later if using hyperref.sty. cite.sty does
% not currently provide for hyperlinked citations.
% The latest version can be obtained at:
% http://www.ctan.org/tex-archive/macros/latex/contrib/cite/
% The documentation is contained in the cite.sty file itself.
 
 
% *** GRAPHICS RELATED PACKAGES ***
%
\ifCLASSINFOpdf
\usepackage[pdftex]{graphicx}
  % declare the path(s) where your graphic files are
  % \graphicspath{{../pdf/}{../jpeg/}}
  % and their extensions so you won't have to specify these with
  % every instance of \includegraphics
  % \DeclareGraphicsExtensions{.pdf,.jpeg,.png}
\else
  % or other class option (dvipsone, dvipdf, if not using dvips). graphicx
  % will default to the driver specified in the system graphics.cfg if no
  % driver is specified.
  % \usepackage[dvips]{graphicx}
  % declare the path(s) where your graphic files are
  % \graphicspath{{../eps/}}
  % and their extensions so you won't have to specify these with
  % every instance of \includegraphics
  % \DeclareGraphicsExtensions{.eps}
\fi
% graphicx was written by David Carlisle and Sebastian Rahtz. It is
% required if you want graphics, photos, etc. graphicx.sty is already
% installed on most LaTeX systems. The latest version and documentation can
% be obtained at: 
% http://www.ctan.org/tex-archive/macros/latex/required/graphics/
% Another good source of documentation is "Using Imported Graphics in
% LaTeX2e" by Keith Reckdahl which can be found as epslatex.ps or
% epslatex.pdf at: http://www.ctan.org/tex-archive/info/
%
% latex, and pdflatex in dvi mode, support graphics in encapsulated
% postscript (.eps) format. pdflatex in pdf mode supports graphics
% in .pdf, .jpeg, .png and .mps (metapost) formats. Users should ensure
% that all non-photo figures use a vector format (.eps, .pdf, .mps) and
% not a bitmapped formats (.jpeg, .png). IEEE frowns on bitmapped formats
% which can result in "jaggedy"/blurry rendering of lines and letters as
% well as large increases in file sizes.
%
% You can find documentation about the pdfTeX application at:
% http://www.tug.org/applications/pdftex
 
 
% *** MATH PACKAGES ***
%
%\usepackage[cmex10]{amsmath}
% A popular package from the American Mathematical Society that provides
% many useful and powerful commands for dealing with mathematics. If using
% it, be sure to load this package with the cmex10 option to ensure that
% only type 1 fonts will utilized at all point sizes. Without this option,
% it is possible that some math symbols, particularly those within
% footnotes, will be rendered in bitmap form which will result in a
% document that can not be IEEE Xplore compliant!
%
% Also, note that the amsmath package sets \interdisplaylinepenalty to 10000
% thus preventing page breaks from occurring within multiline equations. Use:
%\interdisplaylinepenalty=2500
% after loading amsmath to restore such page breaks as IEEEtran.cls normally
% does. amsmath.sty is already installed on most LaTeX systems. The latest
% version and documentation can be obtained at:
% http://www.ctan.org/tex-archive/macros/latex/required/amslatex/math/
 
 
% *** SPECIALIZED LIST PACKAGES ***
%
%\usepackage{algorithmic}
% algorithmic.sty was written by Peter Williams and Rogerio Brito.
% This package provides an algorithmic environment fo describing algorithms.
% You can use the algorithmic environment in-text or within a figure
% environment to provide for a floating algorithm. Do NOT use the algorithm
% floating environment provided by algorithm.sty (by the same authors) or
% algorithm2e.sty (by Christophe Fiorio) as IEEE does not use dedicated
% algorithm float types and packages that provide these will not provide
% correct IEEE style captions. The latest version and documentation of
% algorithmic.sty can be obtained at:
% http://www.ctan.org/tex-archive/macros/latex/contrib/algorithms/
% There is also a support site at:
% http://algorithms.berlios.de/index.html
% Also of interest may be the (relatively newer and more customizable)
% algorithmicx.sty package by Szasz Janos:
% http://www.ctan.org/tex-archive/macros/latex/contrib/algorithmicx/
 
 
% *** ALIGNMENT PACKAGES ***
%
%\usepackage{array}
% Frank Mittelbach's and David Carlisle's array.sty patches and improves
% the standard LaTeX2e array and tabular environments to provide better
% appearance and additional user controls. As the default LaTeX2e table
% generation code is lacking to the point of almost being broken with
% respect to the quality of the end results, all users are strongly
% advised to use an enhanced (at the very least that provided by array.sty)
% set of table tools. array.sty is already installed on most systems. The
% latest version and documentation can be obtained at:
% http://www.ctan.org/tex-archive/macros/latex/required/tools/
 
 
%\usepackage{mdwmath}
%\usepackage{mdwtab}
% Also highly recommended is Mark Wooding's extremely powerful MDW tools,
% especially mdwmath.sty and mdwtab.sty which are used to format equations
% and tables, respectively. The MDWtools set is already installed on most
% LaTeX systems. The lastest version and documentation is available at:
% http://www.ctan.org/tex-archive/macros/latex/contrib/mdwtools/
 
 
% IEEEtran contains the IEEEeqnarray family of commands that can be used to
% generate multiline equations as well as matrices, tables, etc., of high
% quality.
 
 
%\usepackage{eqparbox}
% Also of notable interest is Scott Pakin's eqparbox package for creating
% (automatically sized) equal width boxes - aka "natural width parboxes".
% Available at:
% http://www.ctan.org/tex-archive/macros/latex/contrib/eqparbox/
 
 
 
% *** SUBFIGURE PACKAGES ***
%\usepackage[tight,footnotesize]{subfigure}
% subfigure.sty was written by Steven Douglas Cochran. This package makes it
% easy to put subfigures in your figures. e.g., "Figure 1a and 1b". For IEEE
% work, it is a good idea to load it with the tight package option to reduce
% the amount of white space around the subfigures. subfigure.sty is already
% installed on most LaTeX systems. The latest version and documentation can
% be obtained at:
% http://www.ctan.org/tex-archive/obsolete/macros/latex/contrib/subfigure/
% subfigure.sty has been superceeded by subfig.sty.
 
 
 
%\usepackage[caption=false]{caption}
\usepackage[font=footnotesize,caption=false]{subfig}
% subfig.sty, also written by Steven Douglas Cochran, is the modern
% replacement for subfigure.sty. However, subfig.sty requires and
% automatically loads Axel Sommerfeldt's caption.sty which will override
% IEEEtran.cls handling of captions and this will result in nonIEEE style
% figure/table captions. To prevent this problem, be sure and preload
% caption.sty with its "caption=false" package option. This is will preserve
% IEEEtran.cls handing of captions. Version 1.3 (2005/06/28) and later 
% (recommended due to many improvements over 1.2) of subfig.sty supports
% the caption=false option directly:
%\usepackage[caption=false,font=footnotesize]{subfig}
%
% The latest version and documentation can be obtained at:
% http://www.ctan.org/tex-archive/macros/latex/contrib/subfig/
% The latest version and documentation of caption.sty can be obtained at:
% http://www.ctan.org/tex-archive/macros/latex/contrib/caption/
 
 
% *** FLOAT PACKAGES ***
%
%\usepackage{fixltx2e}
% fixltx2e, the successor to the earlier fix2col.sty, was written by
% Frank Mittelbach and David Carlisle. This package corrects a few problems
% in the LaTeX2e kernel, the most notable of which is that in current
% LaTeX2e releases, the ordering of single and double column floats is not
% guaranteed to be preserved. Thus, an unpatched LaTeX2e can allow a
% single column figure to be placed prior to an earlier double column
% figure. The latest version and documentation can be found at:
% http://www.ctan.org/tex-archive/macros/latex/base/
 
 
 
%\usepackage{stfloats}
% stfloats.sty was written by Sigitas Tolusis. This package gives LaTeX2e
% the ability to do double column floats at the bottom of the page as well
% as the top. (e.g., "\begin{figure*}[!b]" is not normally possible in
% LaTeX2e). It also provides a command:
%\fnbelowfloat
% to enable the placement of footnotes below bottom floats (the standard
% LaTeX2e kernel puts them above bottom floats). This is an invasive package
% which rewrites many portions of the LaTeX2e float routines. It may not work
% with other packages that modify the LaTeX2e float routines. The latest
% version and documentation can be obtained at:
% http://www.ctan.org/tex-archive/macros/latex/contrib/sttools/
% Documentation is contained in the stfloats.sty comments as well as in the
% presfull.pdf file. Do not use the stfloats baselinefloat ability as IEEE
% does not allow \baselineskip to stretch. Authors submitting work to the
% IEEE should note that IEEE rarely uses double column equations and
% that authors should try to avoid such use. Do not be tempted to use the
% cuted.sty or midfloat.sty packages (also by Sigitas Tolusis) as IEEE does
% not format its papers in such ways.
 
% --------------- USEPACKAGE agregados por guanucoluis ----------------
 
\usepackage[utf8]{inputenc}
%\usepackage[spanish]{babel}
%\usepackage[pdftex]{graphicx}
 
 
% ------------------------- Agregados por maxi ------------------------
 
\renewcommand{\abstractname}{Resumen}
 
%lista de posibles "Fixed names"  de latex que pueden hacer falta
%\abstractname	 Abstract
%\alsoname	 see also (makeidx package)
%\appendixname	 Appendix
%\bibname	 Bibliography (report,book)
%\ccname	 cc (letter)
%\chaptername	 Chapter (report,book)
%\contentsname	 Contents
%\enclname	 encl (letter)
%\figurename	 Figure (for captions)
%\headtoname	 To (letter)
%\indexname	 Index
%\listfigurename	 List of Figures
%\listtablename	 List of Tables
%\pagename	 Page (letter)
%\partname	 Part
%\refname	 References (article)
%\seename	 see (makeidx package)
%\tablename	 Table (for caption)
 
 
% *** PDF, URL AND HYPERLINK PACKAGES ***
%
%\usepackage{url}
% url.sty was written by Donald Arseneau. It provides better support for
% handling and breaking URLs. url.sty is already installed on most LaTeX
% systems. The latest version can be obtained at:
% http://www.ctan.org/tex-archive/macros/latex/contrib/misc/
% Read the url.sty source comments for usage information. Basically,
% \url{my_url_here}.
 
 
% *** Do not adjust lengths that control margins, column widths, etc. ***
% *** Do not use packages that alter fonts (such as pslatex).         ***
% There should be no need to do such things with IEEEtran.cls V1.6 and later.
% (Unless specifically asked to do so by the journal or conference you plan
% to submit to, of course. )
 
 
% correct bad hyphenation here
\hyphenation{op-tical net-works semi-conduc-tor}
 
 
\begin{document}
%
% paper title
% can use linebreaks \\ within to get better formatting as desired
\title{Plataforma de Hardware Reconfigurable para el Diseño de Sistemas Digitales}
 
 
% author names and affiliations
% use a multiple column layout for up to three different
% affiliations
\author{\IEEEauthorblockN{Alexis Maximiliano Quiteros, Luis Alberto Guanuco, Sergio Daniel Olmedo}
\IEEEauthorblockA{Centro Universitario de Desarrollo en Automoción y Robótica\\
Universidad Tecnológica Nacional\\
Facultad Regional Córdoba\\
Email: maximiliano.quinteros@gmail.com, lguanuco@electronica.frc.utn.edu.ar, solmedo@scdt.frc.utn.edu.ar}
% \and
% \IEEEauthorblockN{Luis Alberto Guanuco}
% \IEEEauthorblockA{Departamento de Ingeniería Electrónica\\
% Universidad Tecnológica Nacional\\
% Facultad Regional Córdoba\\
% Email: lguanuco@electronica.frc.utn.edu.ar}
% \and
% \IEEEauthorblockN{Sergio Daniel Olmedo}
% \IEEEauthorblockA{CUDAR\\%Centro Universitario de Desarrollo en Automoción y Robótica\\
% Universidad Tecnológica Nacional\\
% Facultad Regional Córdoba\\
% Email: solmedo@scdt.frc.utn.edu.ar}
}
 
 
% conference papers do not typically use \thanks and this command
% is locked out in conference mode. If really needed, such as for
% the acknowledgment of grants, issue a \IEEEoverridecommandlockouts
% after \documentclass
 
% for over three affiliations, or if they all won't fit within the width
% of the page, use this alternative format:
% 
%\author{\IEEEauthorblockN{Michael Shell\IEEEauthorrefmark{1},
%Homer Simpson\IEEEauthorrefmark{2},
%James Kirk\IEEEauthorrefmark{3}, 
%Montgomery Scott\IEEEauthorrefmark{3} and
%Eldon Tyrell\IEEEauthorrefmark{4}}
%\IEEEauthorblockA{\IEEEauthorrefmark{1}School of Electrical and Computer Engineering\\
%Georgia Institute of Technology,
%Atlanta, Georgia 30332--0250\\ Email: see http://www.michaelshell.org/contact.html}
%\IEEEauthorblockA{\IEEEauthorrefmark{2}Twentieth Century Fox, Springfield, USA\\
%Email: homer@thesimpsons.com}
%\IEEEauthorblockA{\IEEEauthorrefmark{3}Starfleet Academy, San Francisco, California 96678-2391\\
%Telephone: (800) 555--1212, Fax: (888) 555--1212}
%\IEEEauthorblockA{\IEEEauthorrefmark{4}Tyrell Inc., 123 Replicant Street, Los Angeles, California 90210--4321}}
 
 
% use for special paper notices
%\IEEEspecialpapernotice{(Invited Paper)}
 
 
% make the title area
\maketitle
 
 
\begin{abstract}
 
La contaste evolución de los sistemas electrónicos (digitales y analógicos) exige la búsqueda de nuevas herramientas para la formación académica. En el caso del diseños de sistemas digitales una excelente alternativa es el uso placas de evaluación basadas en dispositivos lógicos programables (PLDs). En función de los requerimientos y necesidades académicas que demandan recursos de hardware, y las oportunidades concretas de desarrollar una plataforma personalizada a las necesidades plateadas es que se presenta una plataforma reconfigurable con especificaciones abiertas. Este diseño cuenta con periféricos básicos con que se pueda interactuar en la implementación de sistemas digitales, pero además cuenta con una FPGA que dispone de una gran cantidad de recursos internos para el uso en sistemas digitales avanzados que requieren gran capacidad de procesamiento. El proyecto se publica en forma libre (licencia GPL) buscando incentivar a otras grupos académicos en la  modificación y adaptación de este trabajo a sus necesidades como así también proponer mejoras en versiones futuras de la plataforma.
 
\end{abstract}
 
% IEEEtran.cls defaults to using nonbold math in the Abstract.
% This preserves the distinction between vectors and scalars. However,
% if the conference you are submitting to favors bold math in the abstract,
% then you can use LaTeX's standard command \boldmath at the very start
% of the abstract to achieve this. Many IEEE journals/conferences frown on
% math in the abstract anyway.
 
% no keywords
 
 
 
 
% For peer review papers, you can put extra information on the cover
% page as needed:
% \ifCLASSOPTIONpeerreview
% \begin{center} \bfseries EDICS Category: 3-BBND \end{center}
% \fi
%
% For peerreview papers, this IEEEtran command inserts a page break and
% creates the second title. It will be ignored for other modes.
\IEEEpeerreviewmaketitle
 
\section{Introducción}
 
Las áreas académicas vinculadas a la electrónica y la computación se encuentran en constante demanda de recursos educativos de hardware y software en virtud de potenciar los conocimientos de los estudiantes. En el caso de las tecnologías con poca difusión o implementación en la industria regional, la principal opción en la importación de plataformas educativas adquiridas a empresas destinadas a la manufacturación de sistemas embebidos. Estas plataformas comerciales se clasifican según su implementación por lo que no siempre cubren los requerimientos académicos, por ejemplo, los requerimientos de hardware para las cátedras iniciales difieren de las cátedras avanzadas. Esta situación presenta la oportunidad de desarrollar una plataforma a la medida de las necesidades de las instituciones académicas. Si se dispone de las especificaciones por parte de los docentes, con la articulación de otras unidades académicas como laboratorios y grupos de investigación, es posible obtener un desarrollo que cubra las expectativas y aliente a la producción regional mediante la transferencias de tecnología. 
 
En el proceso de aprendizaje de las denominadas Técnicas Digitales necesariamente se debe implementar los diseños digitales. El Álgebra de Bool con operaciones digitales simples, hasta la implementación de un microprocesador son prácticas comunes de los sistemas digitales lógicos y  resulta fundamental su ejercitación para concluir el ciclo de enseñanza. 
 
Existen varios trabajos ya en la década de los 90s donde se plantaba \cite{ASArev.1} la necesidad de contar con una plataforma educativa que permitiera el estudio e implementación del diseño digital, sobre todo nuevas arquitecturas de microprocesadores. Si bien no se contaba con la capacidad de integración en la fabricación de circuitos integrados que se alcanzó en esta época, se apuntaba en aquel entonces al uso de nuevos dispositivos denominados FPGA\cite{PLD-hist}. Esta tendencia continuo al punto tal que se avanzaban con desarrollos de placas más avanzadas que ofrecían mucho más recursos debido al constante avance en el proceso de integración de los semiconductores. Se generaron proyectos académicos \cite{FPGA-platform-CPU-design}\cite{Low-Cost-Interactive-Rapid-Prototyping}\cite{FPGA-Based-Experiment-Platform-for-Multi-Core-System}, abiertos \cite{Building-an-Evolvable-Low-Cost-HWSW-Platform}\cite{NetFPGA} y comerciales \cite{Port-Emb-Linux-XUP-Virtex-II.Dev-Board}.
 
 
En estas últimas décadas los sistemas embebidos han cobrado una gran importancia, en particular se hace referencia a los Dispositivos Lógicos Programables (PLDs, siglas en inglés). Estos dispositivos lógicos actualmente ofrecen grandes recursos de hardware debido a los avances en los procesos de integración en su fabricación, obviamente que ha beneficiado a todos los circuitos integrados (ICs, siglas en inglés) en general. 
 
Los Dispositivos Lógicos Programables fueron introducidos a medidos de 1970s. Se basaba en la idea de construir circuitos lógicos combinacionales que fueran programables. Contrariamente a los microprocesadores, los cuales pueden correr un programa sobre un hardware fijo, la programabilidad de los PLDs hace referencia a niveles de hardware. En otras palabras, un PLD es un chip de propósitos generales cuyo hardware puede ser reconfigurado dependiendo de especificaciones particulares del desarrollador.
 
Si bien las diferentes industrias (militar[REF], automotriz[REF], comunicaciones[REF], de consumo[REF], etc.) son quienes demandan constantemente avances tecnológicos, muchas veces el sector académico resulta ser el gestor de grandes desarrollos e investigaciones que beneficia a estas industrias. En nuestra región la tecnología PLDs se encuentra en su auge hace unos años. Instituciones gubernamentales de defensa[REF], aeroespaciales[REF], comunicaciones[REF] están implementando dispositivos como FPGAs y CPLDs en sus diseños. Además existe una constante actualización por parte de las instituciones académicas en los programas analíticos de las carreras relacionadas a los sistemas embebidos[REF]. 
 
En el estudio de nuevos sistemas digitales las herramientas de software son eficientes, pues permiten realizar simulaciones que se asemejan a la implementación física. Pero muchas veces son necesarias las implementaciones en hardware y es ahí donde se hacen necesarias las plataformas evaluadoras. Estas placas disponen de un diseño que cubre un gran espectro de aplicación según la tecnología y la complejidad del desarrollo. Este concepto no solo se aplica a los sistemas embebidos, pues varias áreas científicas requieren de un gran porcentaje de laboratorio[REF].
 
La mayoría de las plataformas de evaluación comerciales son fabricadas en el exterior del país. Se han encontrado desarrollos nacionales pero no son comercializados sino usados en laboratorios universitarios. Entre las empresas fabricantes de sistemas embebidos basados en dispositivos PLDs, se destacan: Xilix, Altera y Digilent. Los principales perfiles de sus desarrollos se encuentran orientados a, 
\begin{itemize}
\item Sistemas de comunicaciones
\item Procesamiento de Señales Digitales (DSP)
\item Automovilismo
\end{itemize}
En la Figura [REF] se pueden ver tres diferentes plataformas orientadas al diseño de sistemas digitales \footnote{Alguna de estas plataformas disponen de módulos conversores ADC y DAC, por lo que se podría decir que también permiten la implementación de sistemas analógicos en dominio discreto.}. Los recursos de hardware que ofrecen estos desarrollos son:
\begin{itemize}
\item Puerto USB
\item Four 6-pin Pmod connectors
\item VGA
\item PS/2
\end{itemize}
 
Atmel AT90USB2 Full-speed USB2 port providing board power and programming/data transfer interface
Xilinx Platform Flash ROM to store FPGA configurations
8 LEDs, 4-digit 7-segment display, 4 buttons, 8 slide switches
PS/2 port and 8-bit VGA port
User-settable clock (25/50/100MHz), plus socket for 2 clock
Four 6-pin header expansion connectors
ESD and short-circuit protection on all I/O signals.
 
 
\begin{figure*}[!t]
  \centerline{
    \subfloat[Avnet Spartan-6 LX150T (Xilinx/Avnet)]{\includegraphics[width=2in]{img/Avnet-Spartan-6-lx9-MicroBoard}%
      \label{fig:xilinx-board}}
    \hfil
    \subfloat[DE0-Nano (Altera)]{\includegraphics[width=2in]{img/de0-nano}%
      \label{fig:altera-board}}
  \hfil
    \subfloat[BASYS2 (Digilent)]{\includegraphics[width=2in]{img/BASYS2-top-400}%
      \label{fig:digilent-board}}}
  \caption{Plataformas de desarrollo educativas basadas en FPGAs}
  \label{fig:board-fpga}
\end{figure*}
 
\section{Elección del PLD}
 
\section{Interfaz JTAG}
\subsection{Hardware}
\subsection{Software}
 
\section{Características}
\subsection{Perifericos}
\subsection{Potencia}
 
\section{Software}
\subsection{XC3Prog}
\subsection{OpenOCD}
 
\section{Implementación}
 
\section{Código abierto}
 
\section{Discusión}
Existen dos formas de solventar esta demanda, la primera opción es la adquisición de estos recursos a empresas que ofrecen plataformas educativas que cumplan con las especificaciones, pero aquí se presenta una segunda opción que es generar estas plataformas personalizadas a las necesidades de la región. Actualmente se dispone de los conocimientos necesarios para emprender un ciclo de trabajo donde las mismas unidades académicas cubren sus demandas a través de diferentes espacios como son los grupos de investigación y laboratorios 
 
 
\section{Conclusiones}
 
% use section* for acknowledgement
\section*{Acknowledgment}
 
 
The authors would like to thank...
 
 
% An example of a floating figure using the graphicx package.
% Note that \label must occur AFTER (or within) \caption.
% For figures, \caption should occur after the \includegraphics.
% Note that IEEEtran v1.7 and later has special internal code that
% is designed to preserve the operation of \label within \caption
% even when the captionsoff option is in effect. However, because
% of issues like this, it may be the safest practice to put all your
% \label just after \caption rather than within \caption{}.
%
% Reminder: the "draftcls" or "draftclsnofoot", not "draft", class
% option should be used if it is desired that the figures are to be
% displayed while in draft mode.
%
%\begin{figure}[!t]
%\centering
%\includegraphics[width=2.5in]{myfigure}
% where an .eps filename suffix will be assumed under latex, 
% and a .pdf suffix will be assumed for pdflatex; or what has been declared
% via \DeclareGraphicsExtensions.
%\caption{Simulation Results}
%\label{fig_sim}
%\end{figure}
 
% Note that IEEE typically puts floats only at the top, even when this
% results in a large percentage of a column being occupied by floats.
 
 
% An example of a double column floating figure using two subfigures.
% (The subfig.sty package must be loaded for this to work.)
% The subfigure \label commands are set within each subfloat command, the
% \label for the overall figure must come after \caption.
% \hfil must be used as a separator to get equal spacing.
% The subfigure.sty package works much the same way, except \subfigure is
% used instead of \subfloat.
%
%\begin{figure*}[!t]
%\centerline{\subfloat[Case I]\includegraphics[width=2.5in]{subfigcase1}%
%\label{fig_first_case}}
%\hfil
%\subfloat[Case II]{\includegraphics[width=2.5in]{subfigcase2}%
%\label{fig_second_case}}}
%\caption{Simulation results}
%\label{fig_sim}
%\end{figure*}
%
% Note that often IEEE papers with subfigures do not employ subfigure
% captions (using the optional argument to \subfloat), but instead will
% reference/describe all of them (a), (b), etc., within the main caption.
 
 
% An example of a floating table. Note that, for IEEE style tables, the 
% \caption command should come BEFORE the table. Table text will default to
% \footnotesize as IEEE normally uses this smaller font for tables.
% The \label must come after \caption as always.
%
%\begin{table}[!t]
%% increase table row spacing, adjust to taste
%\renewcommand{\arraystretch}{1.3}
% if using array.sty, it might be a good idea to tweak the value of
% \extrarowheight as needed to properly center the text within the cells
%\caption{An Example of a Table}
%\label{table_example}
%\centering
%% Some packages, such as MDW tools, offer better commands for making tables
%% than the plain LaTeX2e tabular which is used here.
%\begin{tabular}{|c||c|}
%\hline
%One & Two\\
%\hline
%Three & Four\\
%\hline
%\end{tabular}
%\end{table}
 
 
% Note that IEEE does not put floats in the very first column - or typically
% anywhere on the first page for that matter. Also, in-text middle ("here")
% positioning is not used. Most IEEE journals/conferences use top floats
% exclusively. Note that, LaTeX2e, unlike IEEE journals/conferences, places
% footnotes above bottom floats. This can be corrected via the \fnbelowfloat
% command of the stfloats package.
 
 
 
% trigger a \newpage just before the given reference
% number - used to balance the columns on the last page
% adjust value as needed - may need to be readjusted if
% the document is modified later
%\IEEEtriggeratref{8}
% The "triggered" command can be changed if desired:
%\IEEEtriggercmd{\enlargethispage{-5in}}
 
% references section
 
% can use a bibliography generated by BibTeX as a .bbl file
% BibTeX documentation can be easily obtained at:
% http://www.ctan.org/tex-archive/biblio/bibtex/contrib/doc/
% The IEEEtran BibTeX style support page is at:
% http://www.michaelshell.org/tex/ieeetran/bibtex/
%\bibliographystyle{IEEEtran}
% argument is your BibTeX string definitions and bibliography database(s)
%\bibliography{IEEEabrv,../bib/paper}
%
% <OR> manually copy in the resultant .bbl file
% set second argument of \begin to the number of references
% (used to reserve space for the reference number labels box)
\begin{thebibliography}{1}
 
% \bibitem{IEEEhowto:kopka}
% H.~Kopka and P.~W. Daly, \emph{A Guide to \LaTeX}, 3rd~ed.\hskip 1em plus
%   0.5em minus 0.4em\relax Harlow, England: Addison-Wesley, 1999.
 
\bibitem{ASArev.1}
Hiroyuki~Ochi, \emph{ASAver.1: An FPGA-Based Education Board for Computer Architecture/system Design}, Design Automation Conference 1997. Proceeding of the ASP-DAC'97. Asia and South Pacific. January 1997.
 
\bibitem{FPGA-platform-CPU-design}
C.~Chang, C.~Huang, Y.~Lin, Z.~Huang and T.~Hu, \emph{FPGA Platform for CPU Design and Applications},  5th. IEEE Conference on Nanotechnology. Nagoya, Japan. July 2005.
 
\bibitem{Building-an-Evolvable-Low-Cost-HWSW-Platform}
A.~Cicuttin, M.~Crespo, A.~Shapiro, N.~Abdallah, \emph{Building an Evolvable Low-Cost HW/SW Educational Platform -- Application to Virtual Instrumentation},  IEEE International Conference on Microelectronic Systems Education, MSE'07. 2007.
 
\bibitem{Low-Cost-Interactive-Rapid-Prototyping}
D.~Kang, S.~Hwang, K.~Jhang, K.~Yi, \emph{A Low Cost and Interactive Rapid Prototyping Platform For Digital System Design Education}, IEEE International Conference on Microelectronic Systems Education, MSE'07. 2007. 
 
\bibitem{NetFPGA}
J.~Lockwood, N.~McKeown, G.~Watson, G.~Gibb, P.~Hartke, J.~Naous, R.~Raghuraman and J.~Luo, \emph{NetFPGA - An Open Platform for Gigabit-rate Network Switching and Routing}, IEEE International Conference on Microelectronic Systems Education, MSE'07. 2007.
 
\bibitem{FPGA-Based-Experiment-Platform-for-Multi-Core-System}
J.~Xing, W.~Zhao and H.~Hu, \emph{An FPGA-Based Experiment Platform for Multi-Cores System}, 9th. International Conference for Young Computer Scientistis, ICYCS'08. 2008.
 
\bibitem{Port-Emb-Linux-XUP-Virtex-II.Dev-Board}
Z.~Qingguo, Y.~Qi, L.~Chanjuan, H.~Bin, \emph{Port Embedded Linux to XUP Virtex-II Por Development Board}, IEEE. 2009.
 
 
 
 
 
 
\bibitem{PLD-hist}
K.~Parnell and N.~Mehta, \emph{Programmable Logic Design Quick Start Handbook}, Rev.~4. Xilinx Inc. 2004.
 
 
 
\end{thebibliography}
 
 
 
 
% that's all folks
\end{document}