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[/] [phr/] [trunk/] [placas/] [OT-CPLD-rev2/] [cpld.bak] - Rev 345

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EESchema Schematic File Version 2  date mié 25 jun 2014 22:03:37 ART
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:xc2c64
LIBS:xilinx_xc9572xl-tq100
LIBS:xc9572xl
LIBS:conn_20x2_DIP40
LIBS:sp6200
LIBS:ap1117
LIBS:oscillators
LIBS:cpld-cache
EELAYER 25  0
EELAYER END
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La disposición de los pines es similar\na la placa adaptadora OCDDLink.
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