URL
https://opencores.org/ocsvn/phr/phr/trunk
Subversion Repositories phr
[/] [phr/] [trunk/] [placas/] [OT-CPLD-rev2/] [cpld.net] - Rev 347
Go to most recent revision | Compare with Previous | Blame | View Log
# EESchema Netlist Version 1.1 created vie 27 jun 2014 17:28:54 ART
(
( /53ACCDA4 $noname P2 CONN_20-CPLD {Lib=CONN_20-CPLD}
( 1 /VCC )
( 2 /CPLD08 )
( 3 /CPLD07 )
( 4 /CPLD06 )
( 5 /CPLD05 )
( 6 /CPLD03 )
( 7 /CPLD02 )
( 8 /CPLD01 )
( 12 /CPLD44 )
( 13 /CPLD42 )
( 14 /CPLD41 )
( 15 /CPLD40 )
( 16 /CPLD39 )
( 17 /CPLD38 )
( 18 /CPLD37 )
( 19 /CPLD36 )
( 20 /CPLD34 )
)
( /53ACCD99 $noname P1 CONN_20-CPLD {Lib=CONN_20-CPLD}
( 1 /Vpower )
( 2 GND )
( 3 /CPLD12 )
( 4 /CPLD13 )
( 5 /CPLD14 )
( 6 /CPLD16 )
( 7 /CPLD18 )
( 8 /CPLD19 )
( 12 /CPLD23 )
( 13 /CPLD22 )
( 14 /CPLD21 )
( 15 /CPLD20 )
( 16 /CPLD27 )
( 17 /CPLD28 )
( 18 /CPLD29 )
( 19 /CPLD30 )
( 20 /CPLD31 )
)
( /53AB712B $noname P3 VCCEXT {Lib=CONN_2}
( 1 /VCCEXT )
( 2 GND )
)
( /53AB70BC $noname K1 VCCIO_SEL {Lib=CONN_3}
( 1 /VCCEXT )
( 2 /VCC )
( 3 /VCC33 )
)
( /53AB6B13 $noname C1 .1u {Lib=C}
( 1 /VCC )
( 2 GND )
)
( /53AB6AE9 $noname R1 1K {Lib=R}
( 1 /VCC )
( 2 N-000007 )
)
( /53AB6AA8 $noname C5 15p {Lib=C}
( 1 /clk )
( 2 GND )
)
( /53AB5F70 m-pad-2.1-ASF1_ASFL_ASFL1 X1 OSCILLATORS-1 {Lib=OSCILLATORS-1}
( 1 N-000007 )
( 2 GND )
( 3 /clk )
( 4 /VCC )
)
( /53AB5E59 $noname R2 330 {Lib=R}
( 1 /led_test )
( 2 N-000010 )
)
( /53AB5E01 $noname R3 10K {Lib=R}
( 1 N-000046 )
( 2 GND )
)
( /53AB4B4C $noname U1 AP1117 {Lib=AP1117}
( 1 GND )
( 2 /VCC33 )
( 3 /Vpower )
)
( /53A8AED0 $noname D1 LED {Lib=LED}
( 1 N-000010 )
( 2 GND )
)
( /53A8AECD $noname R4 10K {Lib=R}
( 1 N-000046 )
( 2 /push_test )
)
( /53A8AE8A $noname SW1 PUSH {Lib=SW_PUSH}
( 1 /VCC )
( 2 N-000046 )
)
( /4EA882CF $noname C4 22uF {Lib=CAPAPOL}
( 1 /VCC33 )
( 2 GND )
)
( /4EA882C2 $noname C3 .1uF {Lib=C}
( 1 /VCC33 )
( 2 GND )
)
( /4EA65376 $noname C2 10u {Lib=C}
( 1 /Vpower )
( 2 GND )
)
( /4EA62E7A $noname U2 XC9572XL {Lib=XC9572XL}
( 1 /CPLD01 )
( 2 /CPLD02 )
( 3 /CPLD03 )
( 4 GND )
( 5 /CPLD05 )
( 6 /CPLD06 )
( 7 /CPLD07 )
( 8 /CPLD08 )
( 9 /TDI )
( 10 /TMS )
( 11 /TCK )
( 12 /CPLD12 )
( 13 /CPLD13 )
( 14 /CPLD14 )
( 15 /VCC33 )
( 16 /CPLD16 )
( 17 GND )
( 18 /CPLD18 )
( 19 /CPLD19 )
( 20 /CPLD20 )
( 21 /CPLD21 )
( 22 /CPLD22 )
( 23 /CPLD23 )
( 24 /TDO )
( 25 GND )
( 26 /VCC )
( 27 /CPLD27 )
( 28 /CPLD28 )
( 29 /CPLD29 )
( 30 /CPLD30 )
( 31 /CPLD31 )
( 32 /led_test )
( 33 /push_test )
( 34 /CPLD34 )
( 35 /VCC33 )
( 36 /CPLD36 )
( 37 /CPLD37 )
( 38 /CPLD38 )
( 39 /CPLD39 )
( 40 /CPLD40 )
( 41 /CPLD41 )
( 42 /CPLD42 )
( 43 /clk )
( 44 /CPLD44 )
)
( /4EA1F196 $noname P4 JTAG-POWER {Lib=CONN_6}
( 1 /TMS )
( 2 /TDI )
( 3 /TDO )
( 4 /TCK )
( 5 /VCC33 )
( 6 GND )
)
)
*
{ Allowed footprints by component:
$component C1
SM*
C?
C1-1
$endlist
$component R1
R?
SM0603
SM0805
R?-*
SM1206
$endlist
$component C5
SM*
C?
C1-1
$endlist
$component R2
R?
SM0603
SM0805
R?-*
SM1206
$endlist
$component R3
R?
SM0603
SM0805
R?-*
SM1206
$endlist
$component D1
LED-3MM
LED-5MM
LED-10MM
LED-0603
LED-0805
LED-1206
LEDV
$endlist
$component R4
R?
SM0603
SM0805
R?-*
SM1206
$endlist
$component C4
CP*
SM*
$endlist
$component C3
SM*
C?
C1-1
$endlist
$component C2
SM*
C?
C1-1
$endlist
$endfootprintlist
}
{ Pin List by Nets
Net 1 "/CPLD05" "CPLD05"
P2 5
U2 5
Net 2 "/CPLD03" "CPLD03"
P2 6
U2 3
Net 3 "/CPLD02" "CPLD02"
P2 7
U2 2
Net 4 "/CPLD01" "CPLD01"
U2 1
P2 8
Net 5 "/CPLD44" "CPLD44"
P2 12
U2 44
Net 6 "GND" "GND"
C3 2
C4 2
C1 2
P4 6
P3 2
D1 2
U2 25
R3 2
U1 1
U2 17
U2 4
P1 2
C5 2
X1 2
C2 2
Net 7 "" ""
X1 1
R1 2
Net 8 "/VCC" "VCC"
K1 2
R1 1
C1 1
U2 26
P2 1
SW1 1
X1 4
Net 9 "/VCC33" "VCC33"
K1 3
C3 1
C4 1
U1 2
P4 5
U2 35
U2 15
Net 10 "" ""
D1 1
R2 2
Net 11 "/CPLD42" "CPLD42"
U2 42
P2 13
Net 12 "/CPLD34" "CPLD34"
U2 34
P2 20
Net 13 "/CPLD14" "CPLD14"
P1 5
U2 14
Net 14 "/clk" "clk"
U2 43
C5 1
X1 3
Net 15 "/push_test" "push_test"
R4 2
U2 33
Net 16 "/CPLD23" "CPLD23"
U2 23
P1 12
Net 17 "/CPLD13" "CPLD13"
U2 13
P1 4
Net 18 "/CPLD16" "CPLD16"
P1 6
U2 16
Net 19 "/led_test" "led_test"
U2 32
R2 1
Net 20 "/CPLD22" "CPLD22"
P1 13
U2 22
Net 21 "/CPLD12" "CPLD12"
P1 3
U2 12
Net 22 "/CPLD41" "CPLD41"
P2 14
U2 41
Net 23 "/CPLD31" "CPLD31"
P1 20
U2 31
Net 24 "/CPLD21" "CPLD21"
P1 14
U2 21
Net 25 "/CPLD40" "CPLD40"
P2 15
U2 40
Net 26 "/CPLD30" "CPLD30"
P1 19
U2 30
Net 27 "/CPLD20" "CPLD20"
P1 15
U2 20
Net 28 "/CPLD39" "CPLD39"
U2 39
P2 16
Net 29 "/CPLD29" "CPLD29"
U2 29
P1 18
Net 30 "/CPLD19" "CPLD19"
U2 19
P1 8
Net 31 "/CPLD38" "CPLD38"
P2 17
U2 38
Net 32 "/CPLD28" "CPLD28"
P1 17
U2 28
Net 33 "/CPLD18" "CPLD18"
P1 7
U2 18
Net 34 "/CPLD37" "CPLD37"
U2 37
P2 18
Net 35 "/CPLD27" "CPLD27"
P1 16
U2 27
Net 36 "/CPLD36" "CPLD36"
P2 19
U2 36
Net 37 "/Vpower" "Vpower"
U1 3
C2 1
P1 1
Net 38 "/TDI" "TDI"
U2 9
P4 2
Net 39 "/CPLD08" "CPLD08"
U2 8
P2 2
Net 40 "/CPLD07" "CPLD07"
P2 3
U2 7
Net 41 "/CPLD06" "CPLD06"
U2 6
P2 4
Net 42 "/TMS" "TMS"
P4 1
U2 10
Net 43 "/TDO" "TDO"
P4 3
U2 24
Net 44 "/TCK" "TCK"
U2 11
P4 4
Net 45 "/VCCEXT" "VCCEXT"
K1 1
P3 1
Net 46 "" ""
R4 1
SW1 2
R3 1
}
#End
Go to most recent revision | Compare with Previous | Blame | View Log