URL
https://opencores.org/ocsvn/plb2wbbridge/plb2wbbridge/trunk
Subversion Repositories plb2wbbridge
[/] [plb2wbbridge/] [trunk/] [systems/] [test_system_sim/] [wb_irqs/] [system_incl.make] - Rev 2
Compare with Previous | Blame | View Log
#################################################################
# Makefile generated by Xilinx Platform Studio
# Project:/home/christian/share/semesterproject/trunk/systems/test_system_sim/wb_irqs/system.xmp
#
# WARNING : This file will be re-generated every time a command
# to run a make target is invoked. So, any changes made to this
# file manually, will be lost when make is invoked next.
#################################################################
XILINX_EDK_DIR = /opt/Xilinx/11.1/EDK
NON_CYG_XILINX_EDK_DIR = /opt/Xilinx/11.1/EDK
SYSTEM = system
MHSFILE = system.mhs
MSSFILE = system.mss
FPGA_ARCH = virtex5
DEVICE = xc5vlx50ff676-1
LANGUAGE = vhdl
SEARCHPATHOPT = -lp /home/christian/share/semesterproject/trunk/systems/EDK_Libs/
GLOBAL_SEARCHPATHOPT =
SUBMODULE_OPT =
PLATGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(SUBMODULE_OPT) -msg __xps/ise/xmsgprops.lst
LIBGEN_OPTIONS = -mhs $(MHSFILE) -p $(DEVICE) $(SEARCHPATHOPT) -msg __xps/ise/xmsgprops.lst
OBSERVE_PAR_OPTIONS = -error yes
MICROBLAZE_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/microblaze/mb_bootloop.elf
PPC405_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc405/ppc_bootloop.elf
PPC440_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc440/ppc440_bootloop.elf
BOOTLOOP_DIR = bootloops
BRAMINIT_ELF_FILES =
BRAMINIT_ELF_FILE_ARGS =
ALL_USER_ELF_FILES =
SIM_CMD = vsim
BEHAVIORAL_SIM_SCRIPT = simulation/behavioral/$(SYSTEM)_setup.do
STRUCTURAL_SIM_SCRIPT = simulation/structural/$(SYSTEM)_setup.do
TIMING_SIM_SCRIPT = simulation/timing/$(SYSTEM)_setup.do
DEFAULT_SIM_SCRIPT = $(BEHAVIORAL_SIM_SCRIPT)
MIX_LANG_SIM_OPT = -mixed yes
SIMGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_FILE_ARGS) $(MIX_LANG_SIM_OPT) -msg __xps/ise/xmsgprops.lst -s mti
LIBRARIES =
LIBSCLEAN_TARGETS =
PROGRAMCLEAN_TARGETS =
CORE_STATE_DEVELOPMENT_FILES =
WRAPPER_NGC_FILES = implementation/mb_plb_wrapper.ngc \
implementation/plb2wb_bridge_0_wrapper.ngc \
implementation/wb_conbus_0_wrapper.ngc \
implementation/onchip_ram_0_wrapper.ngc
POSTSYN_NETLIST = implementation/$(SYSTEM).ngc
SYSTEM_BIT = implementation/$(SYSTEM).bit
DOWNLOAD_BIT = implementation/download.bit
SYSTEM_ACE = implementation/$(SYSTEM).ace
UCF_FILE = data/system.ucf
BMM_FILE = implementation/$(SYSTEM).bmm
BITGEN_UT_FILE = etc/bitgen.ut
XFLOW_OPT_FILE = etc/fast_runtime.opt
XFLOW_DEPENDENCY = __xps/xpsxflow.opt $(XFLOW_OPT_FILE)
XPLORER_DEPENDENCY = __xps/xplorer.opt
XPLORER_OPTIONS = -p $(DEVICE) -uc $(SYSTEM).ucf -bm $(SYSTEM).bmm -max_runs 7
FPGA_IMP_DEPENDENCY = $(BMM_FILE) $(POSTSYN_NETLIST) $(UCF_FILE) $(XFLOW_DEPENDENCY)
SDK_EXPORT_DIR = SDK/SDK_Export/hw
SYSTEM_HW_HANDOFF = $(SDK_EXPORT_DIR)/$(SYSTEM).xml
SYSTEM_HW_HANDOFF_BIT = $(SDK_EXPORT_DIR)/$(SYSTEM).bit
SYSTEM_HW_HANDOFF_DEP = $(SYSTEM_HW_HANDOFF) $(SYSTEM_HW_HANDOFF_BIT)