URL
https://opencores.org/ocsvn/pss/pss/trunk
Subversion Repositories pss
[/] [pss/] [trunk/] [pss/] [hdl/] [pss/] [zpu_uc/] [zpu_core/] [zpu_config.vhd] - Rev 7
Go to most recent revision | Compare with Previous | Blame | View Log
-- ZPU -- -- Copyright 2004-2008 oharboe - Øyvind Harboe - oyvind.harboe@zylin.com -- -- The FreeBSD license -- -- Redistribution and use in source and binary forms, with or without -- modification, are permitted provided that the following conditions -- are met: -- -- 1. Redistributions of source code must retain the above copyright -- notice, this list of conditions and the following disclaimer. -- 2. Redistributions in binary form must reproduce the above -- copyright notice, this list of conditions and the following -- disclaimer in the documentation and/or other materials -- provided with the distribution. -- -- THIS SOFTWARE IS PROVIDED BY THE ZPU PROJECT ``AS IS'' AND ANY -- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, -- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -- ZPU PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF -- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -- -- The views and conclusions contained in the software and documentation -- are those of the authors and should not be interpreted as representing -- official policies, either expressed or implied, of the ZPU Project. library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; package zpu_config is -- generate trace output or not. constant Generate_Trace : boolean := false; constant wordPower : integer := 5; -- during simulation, set this to '0' to get matching trace.txt constant DontCareValue : std_logic := '0'; -- Clock frequency in MHz. constant ZPU_Frequency : std_logic_vector(7 downto 0) := x"40"; -- This is the msb address bit. bytes=2^(maxAddrBitIncIO+1) constant maxAddrBitIncIO : integer := 31; -- start byte address of stack. -- point to top of RAM - 2*words -- constant spStart : std_logic_vector(maxAddrBitIncIO downto 0) := x"00001ff8"; end zpu_config;
Go to most recent revision | Compare with Previous | Blame | View Log