Subversion Repositories pwm_with_dithering

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-- Company: 		 Aboa Space Research Oy (ASRO)
-- Engineer: 		 Tero Säntti
-- 
-- Create Date:    15:23:55 01/28/2021 
-- Design Name: 	 PWM verifier
-- Module Name:    analyzer - Behavioral 
-- Target Devices: None / Simulation ONLY
-- Tool versions:  None / non-specific
-- Description: 	 Analog value analyzer for testing filtered PWM
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.math_real.all;
 
entity analyzer is
    Generic ( 
				supply_voltage : real:=3.3;
				filter_strength: real:=0.99
				);
    Port ( enable : in std_logic;
			  v_in : in  real;
           v_out : buffer real;
			  v_max : buffer real;
			  v_min : buffer real;
			  v_p2p : out real
			  );
end analyzer;
 
architecture Behavioral of analyzer is
 
begin
 
v_p2p <= v_max - v_min;
 
doit:process(v_in,enable)
variable v_new:real;
begin
	if enable = '0' then
		v_out <= v_in;
		v_max <= 0.0;
		v_min <= supply_voltage;
	else
		v_new := (filter_strength * v_out) + ((1.0-filter_strength) * v_in);
		if v_in > v_max then v_max <= v_in; end if;
		if v_in < v_min then v_min <= v_in; end if;
		v_out <= v_new;
	end if;
end process;
 
end Behavioral;