Subversion Repositories pwm_with_dithering

----------------------------------------------------------------------------------
-- Company: 		 Aboa Space Research Oy (ASRO)
-- Engineer: 		 Tero Säntti
-- 
-- Create Date:    13:41:20 01/28/2021 
-- Design Name: 	 PWM verifier
-- Module Name:    rc_filter - Behavioral 
-- Target Devices: None / Simulation ONLY
-- Tool versions:  None / non-specific
-- Description: 	 Secondary RC filter for testing. Adjustable R, C and supply 
--						 voltage. Auto refresh option, to improve accuracy.
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.math_real.all;
 
entity rc_filter is
    Generic ( 
				autorefresh_interval : time;
				autorefresh_enabled : boolean;
				supply_voltage : real:=3.3;
				R : real:=100.0;
				C : real:=0.0001
				);
    Port ( v_in : in  real;
           v_out : out real
			  );
end rc_filter;
 
architecture Behavioral of rc_filter is
signal v_internal:real:=0.0;
signal auto:std_logic:='0';
 
begin
 
-- output mapping:
v_out <= v_internal;
 
doit:process(v_in,auto)
variable time_diff:time;
variable real_time_diff_sec:real;
variable last_update:time:= 0 ns;
begin
	time_diff := now - last_update;
	real_time_diff_sec:=(real(time_diff/(1 ps)))/1000000000000.0;
	v_internal <= v_internal + (v_in-v_internal)*(1.0-(2.71828182845904523536028747135266249775724709369995 ** ((0.0-real_time_diff_sec)/(R*C))));
	last_update := now;
end process;
 
autorefresh:process
   begin
		if autorefresh_enabled then
			auto <= '0';
			wait for autorefresh_interval;
			auto <= '1';
			wait for autorefresh_interval;
		else 
			auto <= '0';
			wait;
		end if;
   end process;
 
end Behavioral;