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[/] [qaz_libs/] [trunk/] [PCIe/] [sim/] [src/] [RIFFA/] [riffa_agent.svh] - Rev 50
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////////////////////////////////////////////////////////////////////////// //////// Copyright (C) 2019 Authors and OPENCORES.ORG //////// //////// This source file may be used and distributed without //////// restriction provided that this copyright statement is not //////// removed from the file and that any derivative work contains //////// the original copyright notice and the associated disclaimer. //////// //////// This source file is free software; you can redistribute it //////// and/or modify it under the terms of the GNU Lesser General //////// Public License as published by the Free Software Foundation; //////// either version 2.1 of the License, or (at your option) any //////// later version. //////// //////// This source is distributed in the hope that it will be //////// useful, but WITHOUT ANY WARRANTY; without even the implied //////// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //////// PURPOSE. See the GNU Lesser General Public License for more //////// details. //////// //////// You should have received a copy of the GNU Lesser General //////// Public License along with this source; if not, download it //////// from http://www.opencores.org/lgpl.shtml //////// //////////////////////////////////////////////////////////////////////////class riffa_agent #(N) extends uvm_agent;`uvm_component_param_utils(riffa_agent #(N))// --------------------------------------------------------------------virtual riffa_chnl_if #(N) vif;riffa_rp_tx_driver #(N) rp_tx_driver_h;riffa_rp_rx_driver #(N) rp_rx_driver_h;riffa_rp_tx_sequencer rp_tx_sequencer_h;riffa_rp_rx_sequencer rp_rx_sequencer_h;// fifo_monitor monitor_h;// --------------------------------------------------------------------virtual function void build_phase(uvm_phase phase);super.build_phase(phase);rp_tx_driver_h = riffa_rp_tx_driver #(N)::type_id::create("rp_tx_driver_h", this);rp_rx_driver_h = riffa_rp_rx_driver #(N)::type_id::create("rp_rx_driver_h", this);rp_tx_sequencer_h = riffa_rp_tx_sequencer::type_id::create("rp_tx_sequencer_h", this);rp_rx_sequencer_h = riffa_rp_rx_sequencer::type_id::create("rp_rx_sequencer_h", this);// monitor_h = fifo_monitor ::type_id::create("monitor_h", this);endfunction// --------------------------------------------------------------------virtual function void connect_phase(uvm_phase phase);super.connect_phase(phase);rp_tx_driver_h.vif = vif;rp_rx_driver_h.vif = vif;// monitor_h.vif = vif;rp_tx_driver_h.seq_item_port.connect(rp_tx_sequencer_h.seq_item_export);rp_rx_driver_h.seq_item_port.connect(rp_rx_sequencer_h.seq_item_export);endfunction// --------------------------------------------------------------------function new(string name, uvm_component parent);super.new(name, parent);endfunction// --------------------------------------------------------------------endclass
