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[/] [qaz_libs/] [trunk/] [PCIe/] [sim/] [src/] [RIFFA/] [riffa_rp_tx_driver.svh] - Rev 50
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//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2019 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
class riffa_rp_tx_driver #(N) extends uvm_driver #(riffa_sequence_item);
`uvm_component_param_utils(riffa_rp_tx_driver #(N))
// --------------------------------------------------------------------
virtual riffa_chnl_if #(N) vif;
//--------------------------------------------------------------------
function void set_default;
vif.cb_rp_tx.rx <= 0;
vif.cb_rp_tx.rx_last <= 'bx;
vif.cb_rp_tx.rx_len <= 'bx;
vif.cb_rp_tx.rx_off <= 'bx;
vif.cb_rp_tx.rx_data <= 'bx;
vif.cb_rp_tx.rx_data_valid <= 0;
endfunction: set_default
//--------------------------------------------------------------------
virtual task run_phase(uvm_phase phase);
riffa_sequence_item item;
reg [(8*N)-1:0] rx_data;
super.run_phase(phase);
set_default();
forever
begin
wait(~vif.rx_reset);
seq_item_port.get_next_item(item);
@(vif.cb_rp_tx);
vif.cb_rp_tx.rx_len <= item.len; // must be => 4
vif.cb_rp_tx.rx_off <= item.off;
vif.cb_rp_tx.rx_last <= item.last;
vif.cb_rp_tx.rx <= 1;
@(vif.cb_rp_tx iff vif.cb_rp_tx.rx_ack);
vif.cb_rp_tx.rx_data_valid <= 1;
for(int i = 0; i < item.beats; i++)
begin
{<<byte{rx_data}} = item.data[i*N +: N];
vif.cb_rp_tx.rx_data <= rx_data;
@(vif.cb_rp_tx iff vif.cb_rp_tx.rx_data_ren);
// $display("^^^^^ %16.t | RX | %d | %h", $time, i, vif.cb_rp_tx.rx_data);
end
set_default();
seq_item_port.item_done();
end
endtask : run_phase
//--------------------------------------------------------------------
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction
// --------------------------------------------------------------------
endclass