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//////////////////////////////////////////////////////////////////////
////                                                              ////
//// Copyright (C) 2017 Authors and OPENCORES.ORG                 ////
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//// This source file may be used and distributed without         ////
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//// This source file is free software; you can redistribute it   ////
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//// Public License as published by the Free Software Foundation; ////
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//////////////////////////////////////////////////////////////////////

module
  riffa_chnl_tx_fsm
  (
    input   tx_ready,
    output  tx,
    output  acked,
    input   tx_ack,
    input   tx_done,

    input   reset,
    input   clk
  );

  //---------------------------------------------------
  //  state machine binary definitions
  enum reg [3:0]
    {
      IDLE    = 4'b0001,
      ACK     = 4'b0010,
      TX      = 4'b0100,
      ERROR   = 4'b1000
    } state, next_state;


  //---------------------------------------------------
  //  state machine flop
  always_ff @(posedge clk)
    if(reset)
      state <= IDLE;
    else
      state <= next_state;


  //---------------------------------------------------
  //  state machine
  always_comb
    case(state)
      IDLE:     if(tx_ready)
                  next_state <= ACK;
                else
                  next_state <= IDLE;

      ACK:      if(tx_ack)
                  next_state <= TX;
                else
                  next_state <= ACK;

      TX:       if(~tx_done)
                  next_state <= TX;
                else
                  next_state <= IDLE;

      ERROR:    next_state <= IDLE;

      default:  next_state <= ERROR;

    endcase


  // --------------------------------------------------------------------
  //
  assign tx     = (state == ACK) | (state == TX);
  assign acked  = (state == TX)  | (next_state == TX);


// --------------------------------------------------------------------
//
endmodule