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[/] [qaz_libs/] [trunk/] [axi4_lib/] [sim/] [src/] [legacy/] [axi4_models/] [axi4_models_pkg.sv] - Rev 45
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////////////////////////////////////////////////////////////////////////// //////// Copyright (C) 2015 Authors and OPENCORES.ORG //////// //////// This source file may be used and distributed without //////// restriction provided that this copyright statement is not //////// removed from the file and that any derivative work contains //////// the original copyright notice and the associated disclaimer. //////// //////// This source file is free software; you can redistribute it //////// and/or modify it under the terms of the GNU Lesser General //////// Public License as published by the Free Software Foundation; //////// either version 2.1 of the License, or (at your option) any //////// later version. //////// //////// This source is distributed in the hope that it will be //////// useful, but WITHOUT ANY WARRANTY; without even the implied //////// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //////// PURPOSE. See the GNU Lesser General Public License for more //////// details. //////// //////// You should have received a copy of the GNU Lesser General //////// Public License along with this source; if not, download it //////// from http://www.opencores.org/lgpl.shtml //////// //////////////////////////////////////////////////////////////////////////// --------------------------------------------------------------------//package axi4_models_pkg;// --------------------------------------------------------------------//virtual class axi4_channel_if_class #(A, N, I);virtual axi4_if #(A, N, I) axi4_bus;event valid;// --------------------------------------------------------------------//pure virtual function void set_master_default;pure virtual function void set_slave_default;pure virtual function void copy(axi4_channel_if_class #(A, N, I) from);pure virtual function void copy_if;pure virtual function void drive_if;pure virtual function void set_ready(bit value);pure virtual function bit is_valid;pure virtual function void set_valid(bit value);pure virtual function bit is_ready;pure virtual function bit is_transfer;//--------------------------------------------------------------------function new(virtual axi4_if #(A, N, I) axi4_bus);this.axi4_bus = axi4_bus;endfunction: new// --------------------------------------------------------------------//endclass: axi4_channel_if_class// --------------------------------------------------------------------//class axi4_channel_sink_q_class #(A, N, I, type T = logic);virtual axi4_if #(A, N, I) axi4_bus;T c_if_h;int q_size;mailbox #(T) q;// --------------------------------------------------------------------//function automatic void run_q;int result;c_if_h.set_ready(1'b1);forkforever@(axi4_bus.cb_s)beginif(c_if_h.is_transfer)beginresult = q.try_put(c_if_h);if(result == 0)$error;c_if_h.copy_if();c_if_h = new(axi4_bus);endif(q.num >= q_size)c_if_h.set_ready(1'b0);elsec_if_h.set_ready(1'b1);endjoin_noneendfunction: run_q//--------------------------------------------------------------------function new( virtual axi4_if #(A, N, I) axi4_bus, int q_size);this.axi4_bus = axi4_bus;this.q_size = q_size;this.q = new(q_size);this.c_if_h = new(axi4_bus);endfunction: new// --------------------------------------------------------------------//endclass: axi4_channel_sink_q_class// --------------------------------------------------------------------//class axi4_channel_source_q_class #(A, N, I, type T = logic);virtual axi4_if #(A, N, I) axi4_bus;T c_if_h;int q_size;mailbox #(T) q;// --------------------------------------------------------------------//function automatic void run_q;int result;c_if_h.set_valid(1'b0);forkforever@(axi4_bus.cb_s)beginif(c_if_h.is_transfer)beginresult = q.try_get(c_if_h);if(result == 0)$stop;endresult = q.try_peek(c_if_h);if(result == 0)c_if_h.set_valid(1'b0);elsebeginc_if_h.set_valid(1'b1);c_if_h.drive_if();endendjoin_noneendfunction: run_q//--------------------------------------------------------------------function new(virtual axi4_if #(A, N, I) axi4_bus, int q_size);this.axi4_bus = axi4_bus;this.q_size = q_size;this.q = new(q_size);this.c_if_h = new(axi4_bus);endfunction: new// --------------------------------------------------------------------//endclass: axi4_channel_source_q_class// --------------------------------------------------------------------//class axi4_aw_if_class #(A, N, I)extends axi4_channel_if_class #(A, N, I);logic [(A-1):0] awaddr;logic [1:0] awburst;logic [(I-1):0] awid;logic [7:0] awlen;logic [2:0] awsize;logic [3:0] awcache;logic awlock;logic [2:0] awprot;logic [3:0] awqos;logic [3:0] awregion;// --------------------------------------------------------------------//function void set_master_default;axi4_bus.cb_m.awvalid <= 0;endfunction: set_master_default// --------------------------------------------------------------------//function void set_slave_default;axi4_bus.cb_s.awready <= 0;endfunction: set_slave_default// --------------------------------------------------------------------//function void copy(axi4_channel_if_class #(A, N, I) from);axi4_aw_if_class #(A, N, I) child;$cast(child, from);awaddr = child.awaddr;awburst = child.awburst;awid = child.awid;awlen = child.awlen;awsize = child.awsize;awcache = child.awcache;awlock = child.awlock;awprot = child.awprot;awqos = child.awqos;awregion = child.awregion;endfunction: copy// --------------------------------------------------------------------//function void copy_if;awaddr = axi4_bus.cb_s.awaddr;awburst = axi4_bus.cb_s.awburst;awid = axi4_bus.cb_s.awid;awlen = axi4_bus.cb_s.awlen;awsize = axi4_bus.cb_s.awsize;awcache = axi4_bus.cb_s.awcache;awlock = axi4_bus.cb_s.awlock;awprot = axi4_bus.cb_s.awprot;awqos = axi4_bus.cb_s.awqos;awregion = axi4_bus.cb_s.awregion;endfunction: copy_if// --------------------------------------------------------------------//function void drive_if;axi4_bus.cb_m.awaddr <= awaddr;axi4_bus.cb_m.awburst <= awburst;axi4_bus.cb_m.awid <= awid;axi4_bus.cb_m.awlen <= awlen;axi4_bus.cb_m.awsize <= awsize;axi4_bus.cb_m.awcache <= awcache;axi4_bus.cb_m.awlock <= awlock;axi4_bus.cb_m.awprot <= awprot;axi4_bus.cb_m.awqos <= awqos;axi4_bus.cb_m.awregion <= awregion;endfunction: drive_if// --------------------------------------------------------------------//function void set_ready(bit value);axi4_bus.cb_s.awready <= value;endfunction: set_ready// --------------------------------------------------------------------//function bit is_valid;return(axi4_bus.cb_s.awvalid);endfunction: is_valid// --------------------------------------------------------------------//function void set_valid(bit value);axi4_bus.cb_m.awvalid <= value;endfunction: set_valid// --------------------------------------------------------------------//function bit is_ready;return(axi4_bus.cb_m.awready);endfunction: is_ready// --------------------------------------------------------------------//function bit is_transfer;return(axi4_bus.cb_m.awready & axi4_bus.cb_s.awvalid);endfunction: is_transfer//--------------------------------------------------------------------function new(virtual axi4_if #(A, N, I) axi4_bus);super.new(axi4_bus);endfunction: new// --------------------------------------------------------------------//endclass: axi4_aw_if_class// --------------------------------------------------------------------//class axi4_ar_if_class #(A, N, I)extends axi4_channel_if_class #(A, N, I);logic [(A-1):0] araddr;logic [1:0] arburst;logic [(I-1):0] arid;logic [7:0] arlen;logic [2:0] arsize;logic [3:0] arcache;logic arlock;logic [2:0] arprot;logic [3:0] arqos;logic [3:0] arregion;// --------------------------------------------------------------------//virtual function void set_master_default;axi4_bus.cb_m.arvalid <= 0;endfunction: set_master_default// --------------------------------------------------------------------//virtual function void set_slave_default;axi4_bus.cb_s.arready <= 0;endfunction: set_slave_default// --------------------------------------------------------------------//virtual function void copy(axi4_channel_if_class #(A, N, I) from);axi4_ar_if_class #(A, N, I) child;$cast(child, from);araddr = child.araddr;arburst = child.arburst;arid = child.arid;arlen = child.arlen;arsize = child.arsize;arcache = child.arcache;arlock = child.arlock;arprot = child.arprot;arqos = child.arqos;arregion = child.arregion;endfunction: copy// --------------------------------------------------------------------//virtual function void copy_if;araddr = axi4_bus.cb_s.araddr;arburst = axi4_bus.cb_s.arburst;arid = axi4_bus.cb_s.arid;arlen = axi4_bus.cb_s.arlen;arsize = axi4_bus.cb_s.arsize;arcache = axi4_bus.cb_s.arcache;arlock = axi4_bus.cb_s.arlock;arprot = axi4_bus.cb_s.arprot;arqos = axi4_bus.cb_s.arqos;arregion = axi4_bus.cb_s.arregion;endfunction: copy_if// --------------------------------------------------------------------//virtual function void drive_if;axi4_bus.cb_m.araddr <= araddr;axi4_bus.cb_m.arburst <= arburst;axi4_bus.cb_m.arid <= arid;axi4_bus.cb_m.arlen <= arlen;axi4_bus.cb_m.arsize <= arsize;axi4_bus.cb_m.arcache <= arcache;axi4_bus.cb_m.arlock <= arlock;axi4_bus.cb_m.arprot <= arprot;axi4_bus.cb_m.arqos <= arqos;axi4_bus.cb_m.arregion <= arregion;endfunction: drive_if// --------------------------------------------------------------------//virtual function void set_ready(bit value);axi4_bus.cb_s.arready <= value;endfunction: set_ready// --------------------------------------------------------------------//virtual function bit is_valid;return(axi4_bus.cb_s.arvalid);endfunction: is_valid// --------------------------------------------------------------------//function void set_valid(bit value);axi4_bus.cb_m.arvalid <= value;endfunction: set_valid// --------------------------------------------------------------------//function bit is_ready;return(axi4_bus.cb_m.arready);endfunction: is_ready// --------------------------------------------------------------------//function bit is_transfer;return(axi4_bus.cb_m.arready & axi4_bus.cb_s.arvalid);endfunction: is_transfer//--------------------------------------------------------------------function new(virtual axi4_if #(A, N, I) axi4_bus);super.new(axi4_bus);endfunction: new// --------------------------------------------------------------------//endclass: axi4_ar_if_class// --------------------------------------------------------------------//class axi4_w_if_class #(A, N, I)extends axi4_channel_if_class #(A, N, I);logic [(8*N)-1:0] wdata;logic [(I-1):0] wid;logic wlast;logic [N-1:0] wstrb;// --------------------------------------------------------------------//function void set_master_default;axi4_bus.cb_m.wvalid <= 0;endfunction: set_master_default// --------------------------------------------------------------------//function void set_slave_default;axi4_bus.cb_s.wready <= 0;endfunction: set_slave_default// --------------------------------------------------------------------//function void copy(axi4_channel_if_class #(A, N, I) from);axi4_w_if_class #(A, N, I) child;$cast(child, from);wdata = child.wdata;wid = child.wid;wlast = child.wlast;wstrb = child.wstrb;endfunction: copy// --------------------------------------------------------------------//function void copy_if;wdata = axi4_bus.cb_s.wdata;wid = axi4_bus.cb_s.wid;wlast = axi4_bus.cb_s.wlast;wstrb = axi4_bus.cb_s.wstrb;endfunction: copy_if// --------------------------------------------------------------------//function void drive_if;axi4_bus.cb_m.wdata <= wdata;axi4_bus.cb_m.wid <= wid;axi4_bus.cb_m.wlast <= wlast;axi4_bus.cb_m.wstrb <= wstrb;endfunction: drive_if// --------------------------------------------------------------------//function void set_ready(bit value);axi4_bus.cb_s.wready <= value;endfunction: set_ready// --------------------------------------------------------------------//function bit is_valid;return(axi4_bus.cb_s.wvalid);endfunction: is_valid// --------------------------------------------------------------------//function void set_valid(bit value);axi4_bus.cb_m.wvalid <= value;endfunction: set_valid// --------------------------------------------------------------------//function bit is_ready;return(axi4_bus.cb_m.wready);endfunction: is_ready// --------------------------------------------------------------------//function bit is_transfer;return(axi4_bus.cb_m.wready & axi4_bus.cb_s.wvalid);endfunction: is_transfer//--------------------------------------------------------------------function new(virtual axi4_if #(A, N, I) axi4_bus);super.new(axi4_bus);endfunction: new// --------------------------------------------------------------------//endclass: axi4_w_if_class// --------------------------------------------------------------------//class axi4_b_if_class #(A, N, I)extends axi4_channel_if_class #(A, N, I);logic [(I-1):0] bid;logic [1:0] bresp;// --------------------------------------------------------------------//function void set_master_default;axi4_bus.cb_m.bready <= 0;endfunction: set_master_default// --------------------------------------------------------------------//function void set_slave_default;axi4_bus.cb_s.bvalid <= 0;endfunction: set_slave_default// --------------------------------------------------------------------//function void copy(axi4_channel_if_class #(A, N, I) from);axi4_b_if_class #(A, N, I) child;$cast(child, from);bid = child.bid;bresp = child.bresp;endfunction: copy// --------------------------------------------------------------------//function void copy_if;bid = axi4_bus.cb_m.bid;bresp = axi4_bus.cb_m.bresp;endfunction: copy_if// --------------------------------------------------------------------//function void drive_if;axi4_bus.cb_s.bid <= bid;axi4_bus.cb_s.bresp <= bresp;endfunction: drive_if// --------------------------------------------------------------------//function void set_ready(bit value);axi4_bus.cb_m.bready <= value;endfunction: set_ready// --------------------------------------------------------------------//function bit is_valid;return(axi4_bus.cb_m.bvalid);endfunction: is_valid// --------------------------------------------------------------------//function void set_valid(bit value);axi4_bus.cb_s.bvalid <= value;endfunction: set_valid// --------------------------------------------------------------------//function bit is_ready;return(axi4_bus.cb_s.bready);endfunction: is_ready// --------------------------------------------------------------------//function bit is_transfer;return(axi4_bus.cb_s.bready & axi4_bus.cb_m.bvalid);endfunction: is_transfer//--------------------------------------------------------------------function new(virtual axi4_if #(A, N, I) axi4_bus);super.new(axi4_bus);endfunction: new// --------------------------------------------------------------------//endclass: axi4_b_if_class// --------------------------------------------------------------------//class axi4_r_if_class #(A, N, I)extends axi4_channel_if_class #(A, N, I);logic [(8*N)-1:0] rdata;logic [(I-1):0] rid;logic rlast;logic [1:0] rresp;// --------------------------------------------------------------------//function void set_master_default;axi4_bus.cb_m.rready <= 0;endfunction: set_master_default// --------------------------------------------------------------------//function void set_slave_default;axi4_bus.cb_s.rvalid <= 0;endfunction: set_slave_default// --------------------------------------------------------------------//function void copy(axi4_channel_if_class #(A, N, I) from);axi4_r_if_class #(A, N, I) child;$cast(child, from);rdata = child.rdata;rid = child.rid;rlast = child.rlast;rresp = child.rresp;endfunction: copy// --------------------------------------------------------------------//function void copy_if;rdata = axi4_bus.cb_m.rdata;rid = axi4_bus.cb_m.rid;rlast = axi4_bus.cb_m.rlast;rresp = axi4_bus.cb_m.rresp;endfunction: copy_if// --------------------------------------------------------------------//function void drive_if;axi4_bus.cb_s.rdata <= rdata;axi4_bus.cb_s.rid <= rid;axi4_bus.cb_s.rlast <= rlast;axi4_bus.cb_s.rresp <= rresp;endfunction: drive_if// --------------------------------------------------------------------//function void set_ready(bit value);axi4_bus.cb_m.rready <= value;endfunction: set_ready// --------------------------------------------------------------------//function bit is_valid;return(axi4_bus.cb_m.rvalid);endfunction: is_valid// --------------------------------------------------------------------//function void set_valid(bit value);axi4_bus.cb_s.rvalid <= value;endfunction: set_valid// --------------------------------------------------------------------//function bit is_ready;return(axi4_bus.cb_s.rready);endfunction: is_ready// --------------------------------------------------------------------//function bit is_transfer;return(axi4_bus.cb_s.rready & axi4_bus.cb_m.rvalid);endfunction: is_transfer//--------------------------------------------------------------------function new(virtual axi4_if #(A, N, I) axi4_bus);super.new(axi4_bus);endfunction: new// --------------------------------------------------------------------//endclass: axi4_r_if_class// --------------------------------------------------------------------//virtual class axi4_master_model_class #(A, N, I);virtual axi4_if #(A, N, I) axi4_m;axi4_aw_if_class #(A, N, I) aw_if_h;axi4_channel_source_q_class #(A, N, I, axi4_aw_if_class #(A, N, I)) aw_q_h;axi4_w_if_class #(A, N, I) w_if_h;axi4_channel_source_q_class #(A, N, I, axi4_w_if_class #(A, N, I)) w_q_h;axi4_b_if_class #(A, N, I) b_if_h;axi4_channel_sink_q_class #(A, N, I, axi4_b_if_class #(A, N, I)) b_q_h;axi4_ar_if_class #(A, N, I) ar_if_h;axi4_channel_source_q_class #(A, N, I, axi4_ar_if_class #(A, N, I)) ar_q_h;axi4_r_if_class #(A, N, I) r_if_h;axi4_channel_sink_q_class #(A, N, I, axi4_r_if_class #(A, N, I)) r_q_h;// --------------------------------------------------------------------//pure virtual task run_model;//--------------------------------------------------------------------function new(virtual axi4_if #(A, N, I) axi4_m);this.axi4_m = axi4_m;this.aw_if_h = new(axi4_m);aw_if_h.set_master_default();this.w_if_h = new(axi4_m);w_if_h.set_master_default();this.b_if_h = new(axi4_m);b_if_h.set_master_default();this.ar_if_h = new(axi4_m);ar_if_h.set_master_default();this.r_if_h = new(axi4_m);r_if_h.set_master_default();forkrun_model();join_noneendfunction: new// --------------------------------------------------------------------//endclass: axi4_master_model_class// --------------------------------------------------------------------//virtual class axi4_slave_model_class #(A, N, I);virtual axi4_if #(A, N, I) axi4_s;axi4_aw_if_class #(A, N, I) aw_if_h;axi4_channel_sink_q_class #(A, N, I, axi4_aw_if_class #(A, N, I)) aw_q_h;axi4_w_if_class #(A, N, I) w_if_h;axi4_channel_sink_q_class #(A, N, I, axi4_w_if_class #(A, N, I)) w_q_h;axi4_b_if_class #(A, N, I) b_if_h;axi4_channel_source_q_class #(A, N, I, axi4_b_if_class #(A, N, I)) b_q_h;axi4_ar_if_class #(A, N, I) ar_if_h;axi4_channel_sink_q_class #(A, N, I, axi4_ar_if_class #(A, N, I)) ar_q_h;axi4_r_if_class #(A, N, I) r_if_h;axi4_channel_source_q_class #(A, N, I, axi4_r_if_class #(A, N, I)) r_q_h;// --------------------------------------------------------------------//pure virtual task run_model;//--------------------------------------------------------------------function new(virtual axi4_if #(A, N, I) axi4_s);this.axi4_s = axi4_s;this.aw_if_h = new(axi4_s);aw_if_h.set_slave_default();this.w_if_h = new(axi4_s);w_if_h.set_slave_default();this.b_if_h = new(axi4_s);b_if_h.set_slave_default();this.ar_if_h = new(axi4_s);ar_if_h.set_slave_default();this.r_if_h = new(axi4_s);r_if_h.set_slave_default();forkrun_model();join_noneendfunction: new// --------------------------------------------------------------------//endclass: axi4_slave_model_class// --------------------------------------------------------------------//endpackage: axi4_models_pkg
