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module ProgramCounter(
  input        Clock,
  input        Reset,
  input        IncrementPC,
  input        WritePC,
  input  [0:7] NewPC,
  output [0:7] ProgramCounter
  );
 
  reg [0:7] TemporalPC;
 
  always@(posedge Clock, negedge Reset) begin
    if (Reset == 1'b0) begin
      TemporalPC <= 8'h00;
    end else begin
      case (WritePC)
        1'b0: begin
          if (TemporalPC < 8'hFF) begin
            TemporalPC <= TemporalPC + IncrementPC;
          end else begin
            TemporalPC <= 8'h00;
          end
        end
        1'b1: begin
          TemporalPC <= NewPC;
        end
      endcase
    end
  end
 
  assign ProgramCounter = TemporalPC;
endmodule