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DSP Block Usage Summary report for cycloneIII_3c25_niosII_video
Wed Aug 15 10:41:28 2012
Quartus II Version 11.0 Build 157 04/27/2011 SJ Web Edition


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; Table of Contents ;
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  1. Legal Notice
  2. Fitter DSP Block Usage Summary



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; Legal Notice ;
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Copyright (C) 1991-2011 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+-----------------------------------------------------------------------------------------------+
; Fitter DSP Block Usage Summary                                                                ;
+---------------------------------------+-------------+---------------------+-------------------+
; Statistic                             ; Number Used ; Available per Block ; Maximum Available ;
+---------------------------------------+-------------+---------------------+-------------------+
; Simple Multipliers (9-bit)            ; 3           ; 2                   ; 132               ;
; Simple Multipliers (18-bit)           ; 23          ; 1                   ; 66                ;
; Embedded Multiplier Blocks            ; 26          ; --                  ; 66                ;
; Embedded Multiplier 9-bit elements    ; 49          ; 2                   ; 132               ;
; Signed Embedded Multipliers           ; 0           ; --                  ; --                ;
; Unsigned Embedded Multipliers         ; 26          ; --                  ; --                ;
; Mixed Sign Embedded Multipliers       ; 0           ; --                  ; --                ;
; Variable Sign Embedded Multipliers    ; 0           ; --                  ; --                ;
; Dedicated Input Shift Register Chains ; 0           ; --                  ; --                ;
+---------------------------------------+-------------+---------------------+-------------------+