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[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [common/] [coreservices/] [icpuriscv.h] - Rev 4
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/** * @file * @copyright Copyright 2016 GNSS Sensor Ltd. All right reserved. * @author Sergey Khabarov - sergeykhbr@gmail.com * @brief RISC-V simulating CPU interface. */ #ifndef __DEBUGGER_SOCSIM_PLUGIN_CPU_RISCV_H__ #define __DEBUGGER_SOCSIM_PLUGIN_CPU_RISCV_H__ #include "iface.h" #include <inttypes.h> namespace debugger { static const char *const IFACE_CPU_RISCV = "ICpuRiscV"; /** Signal types */ //static const int CPU_SIGNAL_RESET = 0; //static const int CPU_SIGNAL_EXT_IRQ = 1; class ICpuRiscV : public IFace { public: ICpuRiscV() : IFace(IFACE_CPU_RISCV) {} }; } // namespace debugger #endif // __DEBUGGER_SOCSIM_PLUGIN_CPU_RISCV_H__