URL
https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk
Subversion Repositories riscv_vhdl
[/] [riscv_vhdl/] [trunk/] [debugger/] [targets/] [functional_arm_gui.json] - Rev 5
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{'GlobalSettings':{'SimEnable':true,'GUI':true,'ScriptFile':'','Description':'This configuration instantiates functional RISC-V model'},'Services':[{'Class':'GuiPluginClass','Instances':[{'Name':'gui0','Attr':[['LogLevel',4],['WidgetsConfig',{'Serial':'port1','AutoComplete':'autocmd0','SocInfo':'info0','PollingMs':250,'EventsLoopMs':10,'RegsViewWidget':{'RegList':[['r0'],['r1'],['r2'],['r3'],[""], ['r4'],['r5'],['r6'],['r7'],['r8'],['r9'],['r10'],['r11'],[""], ['fp'],['sp'],['lr'],['pc'],[''],['npc'],[''],['cpsr']],'RegWidthBytes':4,}}],['SocInfo','info0'],['CommandExecutor','cmdexec0']]}]},{'Class':'SerialDbgServiceClass','Instances':[{'Name':'uarttap','Attr':[['LogLevel',1],['Port','uartmst0'],['Timeout',500]]}]},{'Class':'EdclServiceClass','Instances':[{'Name':'edcltap','Attr':[['LogLevel',1],['Transport','udpedcl'],['seq_cnt',0]]}]},{'Class':'UdpServiceClass','Instances':[{'Name':'udpboard','Attr':[['LogLevel',1],['Timeout',0x190]]},{'Name':'udpedcl','Attr':[['LogLevel',1],['Timeout',0x3e8],['HostIP','192.168.0.53'],['BoardIP','192.168.0.51']]}]},{'Class':'TcpServerClass','Instances':[{'Name':'rpcserver','Attr':[['LogLevel',4],['Enable',true],['Timeout',500],['BlockingMode',true],['HostIP',''],['HostPort',8687]]}]},{'Class':'ComPortServiceClass','Instances':[{'Name':'port1','Attr':[['LogLevel',2],['Enable',true],['UartSim','uart0'],['ComPortName','COM3'],['ComPortSpeed',115200]]}]},{'Class':'ElfReaderServiceClass','Instances':[{'Name':'loader0','Attr':[['LogLevel',4],['SourceProc','src0']]}]},{'Class':'ConsoleServiceClass','Instances':[{'Name':'console0','Attr':[['LogLevel',4],['Enable',true],['StepQueue','core0'],['AutoComplete','autocmd0'],['CommandExecutor','cmdexec0'],['DefaultLogFile','default.log'],['Signals','gpio0'],['InputPort','port1']]}]},{'Class':'AutoCompleterClass','Instances':[{'Name':'autocmd0','Attr':[['LogLevel',4],['SocInfo','info0']['HistorySize',64],['History',['csr MCPUID','csr MTIME','read 0xfffff004 128','loadelf helloworld','loadelf e:/zephyr.elf nocode',]]]}]},{'Class':'CmdExecutorClass','Instances':[{'Name':'cmdexec0','Attr':[['LogLevel',4],['Tap','edcltap'],['SocInfo','info0']]}]},{'Class':'SocInfoClass','Instances':[{'Name':'info0','Attr':[['LogLevel',4],['DsuBaseAddress',0x80080000],['ListRegs',[['r0',4,0x08000],['r1',4,0x08008],['r2',4,0x08010],['r3',4,0x08018],['r4',4,0x08020],['r5',4,0x08028],['r6',4,0x08030],['r7',4,0x08038],['r8',4,0x08040],['r9',4,0x08048],['r10',4,0x08050],['r11',4,0x08058],['fp',4,0x08060],['sp',4,0x08068],['lr',4,0x08070],['cpsr',4,0x08080],['pc',4,0x08100],['npc',4,0x08108]]]]}]},{'Class':'SimplePluginClass','Instances':[{'Name':'example0','Attr':[['LogLevel',4],['attr1','This is test attr value']]}]},{'Class':'ArmSourceServiceClass','Instances':[{'Name':'src0','Attr':[['LogLevel',4],['Endianess',0, '0=LSB (x86); 1=MSB(ARM)'],]}]},{'Class':'GrethClass','Instances':[{'Name':'greth0','Attr':[['LogLevel',1],['BaseAddress',0x80040000],['Length',0x40000],['SysBusMasterID',2,'Hardcoded in VHDL'],['IP',0x55667788],['MAC',0xfeedface00],['Bus','axi0'],['Transport','udpboard']]}]},{'Class':'CpuCortex_FunctionalClass','Instances':[{'Name':'core0','Attr':[['Enable',true],['LogLevel',3],['SysBusMasterID',0,'Used to gather Bus statistic'],['SysBus','axi0'],['DbgBus','dbgbus0'],['SysBusWidthBytes',4,'Split dma transactions from CPU'],['StackTraceSize',64,'Number of 16-bytes entries'],['ResetVector',0x0000],['FreqHz',60000000],['SysBusMasterID',0],['SourceCode','src0'],['GenerateRegTraceFile',false,'Generate Registers modification file to compare with SystemC'],['GenerateMemTraceFile',false,'Generate Memory access file to compare with SystemC'],]}]},{'Class':'MemorySimClass','Instances':[{'Name':'bootrom0','Attr':[['LogLevel',1],['InitFile','../../../examples/bootarm/linuxbuild/bin/bootimage.hex'],['ReadOnly',true],['BaseAddress',0x0],['Length',8192]]}]},{'Class':'MemorySimClass','Instances':[{'Name':'fwimage0','Attr':[['LogLevel',1],['InitFile','../../../examples/dhrystone21/makefiles/bin/dhrystone21.hex'],['ReadOnly',true],['BaseAddress',0x00100000],['Length',0x40000]]}]},{'Class':'MemorySimClass','Instances':[{'Name':'sram0','Attr':[['LogLevel',1],['InitFile','../../../examples/dhrystone21/makefiles/bin/dhrystone21.hex'],['ReadOnly',false],['BaseAddress',0x10000000],['Length',0x80000]]}]},{'Class':'GPIOClass','Instances':[{'Name':'gpio0','Attr':[['LogLevel',3],['BaseAddress',0x80000000],['Length',4096],['DIP',0x1]]}]},{'Class':'UARTClass','Instances':[{'Name':'uart0','Attr':[['LogLevel',1],['BaseAddress',0x80001000],['Length',4096],['IrqControl',['irqctrl0','irq1']],['AutoTestEna',false,'Enable/Disable automatic test input via serial interface'],['TestCases',[[22097,'s'],[22500,'et'],[24399,'_mo'],[25780,'dul'],[28999,'e s'],[31599,'oc'],[32599,'\r\n'],[48599,'dhr'],[49599,'y\r\n']]]]}]},{'Class':'IrqControllerClass','Instances':[{'Name':'irqctrl0','Attr':[['LogLevel',1],['BaseAddress',0x80002000],['Length',4096],['CPU','core0'],['IrqTotal',4],['CSR_MIPI',0x783]]}]},{'Class':'DSUClass','Instances':[{'Name':'dsu0','Attr':[['LogLevel',1],['BaseAddress',0x80080000],['Length',0x20000],['CPU','core0'],['Bus','axi0']]}]},{'Class':'GNSSStubClass','Instances':[{'Name':'gnss0','Attr':[['LogLevel',1],['BaseAddress',0x80003000],['Length',4096],['IrqControl',['irqctrl0','irq5']],['ClkSource','core0']]}]},{'Class':'RfControllerClass','Instances':[{'Name':'rfctrl0','Attr':[['LogLevel',1],['BaseAddress',0x80004000],['Length',4096]]}]},{'Class':'GPTimersClass','Instances':[{'Name':'gptmr0','Attr':[['LogLevel',1],['BaseAddress',0x80005000],['Length',4096],['IrqControl',['irqctrl0','irq3']],['ClkSource','core0']]}]},{'Class':'UartMstClass','Instances':[{'Name':'uartmst0','Attr':[['LogLevel',1],['Bus','axi0']]}]},{'Class':'FseV2Class','Instances':[{'Name':'fsegps0','Attr':[['LogLevel',1],['BaseAddress',0x80008000],['Length',4096]]}]},{'Class':'PNPClass','Instances':[{'Name':'pnp0','Attr':[['LogLevel',4],['BaseAddress',0xfffff000],['Length',4096],['Tech',0],['AdcDetector',0xff]]}]},{'Class':'BusClass','Instances':[{'Name':'axi0','Attr':[['LogLevel',3],['DSU','dsu0'],['MapList',['bootrom0','fwimage0','sram0','gpio0','uart0','irqctrl0','gnss0','gptmr0','pnp0','dsu0','greth0','rfctrl0','fsegps0']]]}]},{'Class':'BusClass','Instances':[{'Name':'dbgbus0','Attr':[['LogLevel',3],['MapList',[['core0','pc'],['core0','npc'],['core0','status'],['core0','regs'],['core0','stepping_cnt'],['core0','clock_cnt'],['core0','executed_cnt'],['core0','stack_trace_cnt'],['core0','stack_trace_buf'],['core0','br_fetch_addr'],['core0','br_fetch_instr'],['core0','br_hw_add'],['core0','br_hw_remove'],]]]}]},{'Class':'HardResetClass','Instances':[{'Name':'reset0','Attr':[['LogLevel',4],['ResetDevices',['core0']]]}]},{'Class':'BoardSimClass','Instances':[{'Name':'boardsim','Attr':[['LogLevel',1]]}]}]}
