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https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk
Subversion Repositories riscv_vhdl
[/] [riscv_vhdl/] [trunk/] [rtl/] [prj/] [ml605/] [_postsim_run.bat] - Rev 5
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fuse -intstyle ise -incremental -lib unisim -lib unimacro -lib xilinxcorelib -lib secureip -o -x_synthesis.exe -prj _postsim.prj work.rocket_soc_tb--x_synthesis.exe -gui