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[/] [rise/] [trunk/] [vhdl/] [idmem.edn] - Rev 150

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(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0))
(status (written (timeStamp 2007 1 14 14 42 55)
   (author "Xilinx, Inc.")
   (program "Xilinx CORE Generator" (version "Xilinx CORE Generator 8.1.03i"))))
   (comment "                                                                                
      This file is owned and controlled by Xilinx and must be used              
      solely for design, simulation, implementation and creation of             
      design files limited to Xilinx devices or technologies. Use               
      with non-Xilinx devices or technologies is expressly prohibited           
      and immediately terminates your license.                                  
                                                                                
      XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS'             
      SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                   
      XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION           
      AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION               
      OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                 
      IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                   
      AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE          
      FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                  
      WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                   
      IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR            
      REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF           
      INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS           
      FOR A PARTICULAR PURPOSE.                                                 
                                                                                
      Xilinx products are not intended for use in life support                  
      appliances, devices, or systems. Use in such applications are             
      expressly prohibited.                                                     
                                                                                
      (c) Copyright 1995-2005 Xilinx, Inc.                                      
      All rights reserved.                                                      
                                                                                
   ")
   (comment "Core parameters: ")
       (comment "c_sinit_value = 0 ")
       (comment "c_has_en = 0 ")
       (comment "c_reg_inputs = 0 ")
       (comment "c_yclk_is_rising = 1 ")
       (comment "c_ysinit_is_high = 0 ")
       (comment "c_ywe_is_high = 1 ")
       (comment "c_yprimitive_type = 8kx2 ")
       (comment "c_ytop_addr = 1024 ")
       (comment "c_yhierarchy = hierarchy1 ")
       (comment "c_has_limit_data_pitch = 1 ")
       (comment "c_has_rdy = 0 ")
       (comment "c_write_mode = 0 ")
       (comment "c_width = 16 ")
       (comment "c_yuse_single_primitive = 0 ")
       (comment "c_has_nd = 0 ")
       (comment "c_has_we = 1 ")
       (comment "c_enable_rlocs = 0 ")
       (comment "c_has_rfd = 0 ")
       (comment "c_has_din = 1 ")
       (comment "c_ybottom_addr = 0 ")
       (comment "c_pipe_stages = 0 ")
       (comment "c_yen_is_high = 1 ")
       (comment "c_family = spartan3 ")
       (comment "InstanceName = idmem ")
       (comment "c_depth = 4096 ")
       (comment "c_has_default_data = 0 ")
       (comment "c_limit_data_pitch = 18 ")
       (comment "c_has_sinit = 1 ")
       (comment "c_mem_init_file = idmem.mif ")
       (comment "c_yydisable_warnings = 1 ")
       (comment "c_default_data = 0 ")
       (comment "c_ymake_bmm = 0 ")
       (comment "c_addr_width = 12 ")
   (external xilinxun (edifLevel 0)
      (technology (numberDefinition))
       (cell VCC (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port P (direction OUTPUT))
               )
           )
       )
       (cell GND (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port G (direction OUTPUT))
               )
           )
       )
       (cell INV (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port I (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell RAMB16_S4 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port WE (direction INPUT))
                   (port EN (direction INPUT))
                   (port SSR (direction INPUT))
                   (port CLK (direction INPUT))
                   (port (rename DI_0_ "DI<0>") (direction INPUT))
                   (port (rename DI_1_ "DI<1>") (direction INPUT))
                   (port (rename DI_2_ "DI<2>") (direction INPUT))
                   (port (rename DI_3_ "DI<3>") (direction INPUT))
                   (port (rename DO_0_ "DO<0>") (direction OUTPUT))
                   (port (rename DO_1_ "DO<1>") (direction OUTPUT))
                   (port (rename DO_2_ "DO<2>") (direction OUTPUT))
                   (port (rename DO_3_ "DO<3>") (direction OUTPUT))
                   (port (rename ADDR_0_ "ADDR<0>") (direction INPUT))
                   (port (rename ADDR_1_ "ADDR<1>") (direction INPUT))
                   (port (rename ADDR_2_ "ADDR<2>") (direction INPUT))
                   (port (rename ADDR_3_ "ADDR<3>") (direction INPUT))
                   (port (rename ADDR_4_ "ADDR<4>") (direction INPUT))
                   (port (rename ADDR_5_ "ADDR<5>") (direction INPUT))
                   (port (rename ADDR_6_ "ADDR<6>") (direction INPUT))
                   (port (rename ADDR_7_ "ADDR<7>") (direction INPUT))
                   (port (rename ADDR_8_ "ADDR<8>") (direction INPUT))
                   (port (rename ADDR_9_ "ADDR<9>") (direction INPUT))
                   (port (rename ADDR_10_ "ADDR<10>") (direction INPUT))
                   (port (rename ADDR_11_ "ADDR<11>") (direction INPUT))
               )
           )
       )
   )
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
(cell idmem
 (cellType GENERIC) (view view_1 (viewType NETLIST)
  (interface
   (port ( array ( rename addr "addr<11:0>") 12 ) (direction INPUT))
   (port ( rename clk "clk") (direction INPUT))
   (port ( array ( rename din "din<15:0>") 16 ) (direction INPUT))
   (port ( rename sinit "sinit") (direction INPUT))
   (port ( rename we "we") (direction INPUT))
   (port ( array ( rename dout "dout<15:0>") 16 ) (direction OUTPUT))
   )
  (contents
   (instance VCC (viewRef view_1 (cellRef VCC  (libraryRef xilinxun))))
   (instance GND (viewRef view_1 (cellRef GND  (libraryRef xilinxun))))
   (instance BU3
      (viewRef view_1 (cellRef INV (libraryRef xilinxun)))
   )
   (instance B7
      (viewRef view_1 (cellRef RAMB16_S4 (libraryRef xilinxun)))
      (property INIT_00 (string "000000000000000000000000000000000000000000000000fedcba9876543210"))
      (property INIT_01 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_02 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_03 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_07 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_08 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_0A (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_0C (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_10 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_11 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_12 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_13 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_15 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_16 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_3E (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_3F (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property WRITE_MODE (string "WRITE_FIRST"))
      (property INIT (string "0"))
      (property SRVAL (string "0"))
   )
   (instance B11
      (viewRef view_1 (cellRef RAMB16_S4 (libraryRef xilinxun)))
      (property INIT_00 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_01 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_27 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_2A (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2B (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2C (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2D (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2E (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2F (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_30 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_32 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_3F (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property WRITE_MODE (string "WRITE_FIRST"))
      (property INIT (string "0"))
      (property SRVAL (string "0"))
   )
   (instance B15
      (viewRef view_1 (cellRef RAMB16_S4 (libraryRef xilinxun)))
      (property INIT_00 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_01 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_27 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_29 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2A (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_2F (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_30 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property INIT_3E (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_3F (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property WRITE_MODE (string "WRITE_FIRST"))
      (property INIT (string "0"))
      (property SRVAL (string "0"))
   )
   (instance B19
      (viewRef view_1 (cellRef RAMB16_S4 (libraryRef xilinxun)))
      (property INIT_00 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_01 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_02 (string "0000000000000000000000000000000000000000000000000000000000000000"))
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      (property WRITE_MODE (string "WRITE_FIRST"))
      (property INIT (string "0"))
      (property SRVAL (string "0"))
   )
   (net N1
    (joined
      (portRef P (instanceRef VCC))
      (portRef EN (instanceRef B7))
      (portRef EN (instanceRef B11))
      (portRef EN (instanceRef B15))
      (portRef EN (instanceRef B19))
    )
   )
   (net (rename N2 "addr<11>")
    (joined
      (portRef (member addr 0))
      (portRef ADDR_11_ (instanceRef B7))
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      (portRef ADDR_11_ (instanceRef B15))
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    )
   )
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      (portRef (member addr 1))
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      (portRef ADDR_10_ (instanceRef B11))
      (portRef ADDR_10_ (instanceRef B15))
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    )
   )
   (net (rename N4 "addr<9>")
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      (portRef (member addr 2))
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      (portRef ADDR_9_ (instanceRef B15))
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    )
   )
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      (portRef (member addr 3))
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    )
   )
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    (joined
      (portRef (member addr 4))
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      (portRef ADDR_7_ (instanceRef B11))
      (portRef ADDR_7_ (instanceRef B15))
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    )
   )
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      (portRef (member addr 5))
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      (portRef ADDR_6_ (instanceRef B15))
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    )
   )
   (net (rename N8 "addr<5>")
    (joined
      (portRef (member addr 6))
      (portRef ADDR_5_ (instanceRef B7))
      (portRef ADDR_5_ (instanceRef B11))
      (portRef ADDR_5_ (instanceRef B15))
      (portRef ADDR_5_ (instanceRef B19))
    )
   )
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      (portRef (member addr 7))
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      (portRef ADDR_4_ (instanceRef B15))
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    )
   )
   (net (rename N10 "addr<3>")
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      (portRef (member addr 8))
      (portRef ADDR_3_ (instanceRef B7))
      (portRef ADDR_3_ (instanceRef B11))
      (portRef ADDR_3_ (instanceRef B15))
      (portRef ADDR_3_ (instanceRef B19))
    )
   )
   (net (rename N11 "addr<2>")
    (joined
      (portRef (member addr 9))
      (portRef ADDR_2_ (instanceRef B7))
      (portRef ADDR_2_ (instanceRef B11))
      (portRef ADDR_2_ (instanceRef B15))
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    )
   )
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    (joined
      (portRef (member addr 10))
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      (portRef ADDR_1_ (instanceRef B11))
      (portRef ADDR_1_ (instanceRef B15))
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    )
   )
   (net (rename N13 "addr<0>")
    (joined
      (portRef (member addr 11))
      (portRef ADDR_0_ (instanceRef B7))
      (portRef ADDR_0_ (instanceRef B11))
      (portRef ADDR_0_ (instanceRef B15))
      (portRef ADDR_0_ (instanceRef B19))
    )
   )
   (net (rename N14 "clk")
    (joined
      (portRef clk)
      (portRef CLK (instanceRef B7))
      (portRef CLK (instanceRef B11))
      (portRef CLK (instanceRef B15))
      (portRef CLK (instanceRef B19))
    )
   )
   (net (rename N15 "din<15>")
    (joined
      (portRef (member din 0))
      (portRef DI_3_ (instanceRef B19))
    )
   )
   (net (rename N16 "din<14>")
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      (portRef (member din 1))
      (portRef DI_2_ (instanceRef B19))
    )
   )
   (net (rename N17 "din<13>")
    (joined
      (portRef (member din 2))
      (portRef DI_1_ (instanceRef B19))
    )
   )
   (net (rename N18 "din<12>")
    (joined
      (portRef (member din 3))
      (portRef DI_0_ (instanceRef B19))
    )
   )
   (net (rename N19 "din<11>")
    (joined
      (portRef (member din 4))
      (portRef DI_3_ (instanceRef B15))
    )
   )
   (net (rename N20 "din<10>")
    (joined
      (portRef (member din 5))
      (portRef DI_2_ (instanceRef B15))
    )
   )
   (net (rename N21 "din<9>")
    (joined
      (portRef (member din 6))
      (portRef DI_1_ (instanceRef B15))
    )
   )
   (net (rename N22 "din<8>")
    (joined
      (portRef (member din 7))
      (portRef DI_0_ (instanceRef B15))
    )
   )
   (net (rename N23 "din<7>")
    (joined
      (portRef (member din 8))
      (portRef DI_3_ (instanceRef B11))
    )
   )
   (net (rename N24 "din<6>")
    (joined
      (portRef (member din 9))
      (portRef DI_2_ (instanceRef B11))
    )
   )
   (net (rename N25 "din<5>")
    (joined
      (portRef (member din 10))
      (portRef DI_1_ (instanceRef B11))
    )
   )
   (net (rename N26 "din<4>")
    (joined
      (portRef (member din 11))
      (portRef DI_0_ (instanceRef B11))
    )
   )
   (net (rename N27 "din<3>")
    (joined
      (portRef (member din 12))
      (portRef DI_3_ (instanceRef B7))
    )
   )
   (net (rename N28 "din<2>")
    (joined
      (portRef (member din 13))
      (portRef DI_2_ (instanceRef B7))
    )
   )
   (net (rename N29 "din<1>")
    (joined
      (portRef (member din 14))
      (portRef DI_1_ (instanceRef B7))
    )
   )
   (net (rename N30 "din<0>")
    (joined
      (portRef (member din 15))
      (portRef DI_0_ (instanceRef B7))
    )
   )
   (net (rename N31 "dout<15>")
    (joined
      (portRef (member dout 0))
      (portRef DO_3_ (instanceRef B19))
    )
   )
   (net (rename N32 "dout<14>")
    (joined
      (portRef (member dout 1))
      (portRef DO_2_ (instanceRef B19))
    )
   )
   (net (rename N33 "dout<13>")
    (joined
      (portRef (member dout 2))
      (portRef DO_1_ (instanceRef B19))
    )
   )
   (net (rename N34 "dout<12>")
    (joined
      (portRef (member dout 3))
      (portRef DO_0_ (instanceRef B19))
    )
   )
   (net (rename N35 "dout<11>")
    (joined
      (portRef (member dout 4))
      (portRef DO_3_ (instanceRef B15))
    )
   )
   (net (rename N36 "dout<10>")
    (joined
      (portRef (member dout 5))
      (portRef DO_2_ (instanceRef B15))
    )
   )
   (net (rename N37 "dout<9>")
    (joined
      (portRef (member dout 6))
      (portRef DO_1_ (instanceRef B15))
    )
   )
   (net (rename N38 "dout<8>")
    (joined
      (portRef (member dout 7))
      (portRef DO_0_ (instanceRef B15))
    )
   )
   (net (rename N39 "dout<7>")
    (joined
      (portRef (member dout 8))
      (portRef DO_3_ (instanceRef B11))
    )
   )
   (net (rename N40 "dout<6>")
    (joined
      (portRef (member dout 9))
      (portRef DO_2_ (instanceRef B11))
    )
   )
   (net (rename N41 "dout<5>")
    (joined
      (portRef (member dout 10))
      (portRef DO_1_ (instanceRef B11))
    )
   )
   (net (rename N42 "dout<4>")
    (joined
      (portRef (member dout 11))
      (portRef DO_0_ (instanceRef B11))
    )
   )
   (net (rename N43 "dout<3>")
    (joined
      (portRef (member dout 12))
      (portRef DO_3_ (instanceRef B7))
    )
   )
   (net (rename N44 "dout<2>")
    (joined
      (portRef (member dout 13))
      (portRef DO_2_ (instanceRef B7))
    )
   )
   (net (rename N45 "dout<1>")
    (joined
      (portRef (member dout 14))
      (portRef DO_1_ (instanceRef B7))
    )
   )
   (net (rename N46 "dout<0>")
    (joined
      (portRef (member dout 15))
      (portRef DO_0_ (instanceRef B7))
    )
   )
   (net (rename N51 "sinit")
    (joined
      (portRef sinit)
      (portRef I (instanceRef BU3))
    )
   )
   (net (rename N52 "we")
    (joined
      (portRef we)
      (portRef WE (instanceRef B7))
      (portRef WE (instanceRef B11))
      (portRef WE (instanceRef B15))
      (portRef WE (instanceRef B19))
    )
   )
   (net N84
    (joined
      (portRef O (instanceRef BU3))
      (portRef SSR (instanceRef B7))
      (portRef SSR (instanceRef B11))
      (portRef SSR (instanceRef B15))
      (portRef SSR (instanceRef B19))
    )
   )
))))
(design idmem (cellRef idmem (libraryRef test_lib))
  (property X_CORE_INFO (string "blkmemsp_v6_2, Coregen 8.1.03i"))
  (property PART (string "xc3s200-ft256-5") (owner "Xilinx")))
)

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