Subversion Repositories s1_core

+define+FPGA_SYN
+define+FPGA_SYN_1THREAD
+define+FPGA_SYN_NO_SPU
+define+SIMPLY_RISC_TWEAKS
+define+SIMPLY_RISC_DEBUG
+incdir+$(S1_ROOT)/hdl/rtl/s1_top
+incdir+$(S1_ROOT)/hdl/rtl/sparc_core/include
$(S1_ROOT)/hdl/rtl/sparc_core/m1_lib.v
$(S1_ROOT)/hdl/rtl/sparc_core/u1_lib.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_dcl.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_stb_ctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_tlu_zcmp64.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_scm.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_ecc_dec.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_mul_cntl.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_addern_32.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ffu_ctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_thrcmpl.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_mmu_ctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_ecl_wb.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_fdp.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_rf32x152b.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_irf_register.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_rf32x80.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_rndrob.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_rml_cwp.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_pib.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_lfsr5.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_qctl1.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_aluadder64.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_mmu_dp.v
$(S1_ROOT)/hdl/rtl/sparc_core/cmp_sram_redhdr.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_swl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_swpla.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_aluspr.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_tlu_intdp.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_incr46.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ffu.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_prencoder16.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_icd.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ffu_part_add32.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ffu_vis.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_stb_rwdp.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_clk_cl_sparc_cmp.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_qctl2.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_imd.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_cmp35.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_eclccr.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_hyperv.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_misctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_rrobin_picker2.v
$(S1_ROOT)/hdl/rtl/sparc_core/swrvr_dlib.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_thrfsm.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_rml_inc3.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_tdp.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_dcache_lfsr.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_rf16x160.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_fcl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_ctr5.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_eclcomp7.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_dc_parity_gen.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_irf.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_tcl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_milfsm.v
$(S1_ROOT)/hdl/rtl/sparc_core/cpx_spc_buf.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_ecl_divcntl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_tlu_dec64.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_div.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_par34.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_alu_16eql.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_dctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/test_stub_scan.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_ecl_cnt6.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_stb_ctldp.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_mul_top.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_lru4.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_par32.v
$(S1_ROOT)/hdl/rtl/sparc_core/cpx_spc_rpt.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_mbist.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_asi_decode.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_ecc.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_tlb.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_stb_rwctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_rml.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_reg.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_aluaddsub.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_byp_eccgen.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_dcdp.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_incr64.v
$(S1_ROOT)/hdl/rtl/sparc_core/mul64.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_aluor32.v
$(S1_ROOT)/hdl/rtl/sparc_core/cluster_header.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_errctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_qdp1.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_alu.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_tagdp.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_rndrob.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu.v
$(S1_ROOT)/hdl/rtl/sparc_core/swrvr_clib.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_ecl_mdqctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_tlu_intctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_qdp2.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_ecl_eccctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_div_yreg.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_alulogic.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_tlu_penc64.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ffu_ctl_visctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_eclbyplog_rs1.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_div_32eql.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_par16.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_eclbyplog.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_idct.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_pcx_qmon.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_dcd.v
$(S1_ROOT)/hdl/rtl/sparc_core/test_stub_bist.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_byp.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_shft.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_sscan.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_dec.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_rf16x32.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_wseldp.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_excpctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/bw_r_frf.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_invctl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ffu_dp.v
$(S1_ROOT)/hdl/rtl/sparc_core/tlu_rrobin_picker.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_aluzcmp64.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_ifqdp.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_dctldp.v
$(S1_ROOT)/hdl/rtl/sparc_core/lsu_tlbdp.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_mul_dp.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_exu_ecl.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_errdp.v
$(S1_ROOT)/hdl/rtl/sparc_core/sparc_ifu_ifqctl.v
$(S1_ROOT)/hdl/rtl/s1_top/rst_ctrl.v
$(S1_ROOT)/hdl/rtl/s1_top/int_ctrl.v
$(S1_ROOT)/hdl/rtl/s1_top/simple_fifo.v
$(S1_ROOT)/hdl/rtl/s1_top/spc2wbm.v
$(S1_ROOT)/hdl/rtl/s1_top/s1_top.v
$(S1_ROOT)/hdl/behav/testbench/mem_harness.v
$(S1_ROOT)/hdl/behav/testbench/testbench.v