OpenCores
URL https://opencores.org/ocsvn/s80186/s80186/trunk

Subversion Repositories s80186

[/] [s80186/] [trunk/] [rtl/] [microcode/] [scas.us] - Rev 2

Compare with Previous | Blame | View Log

// Copyright Jamie Iles, 2017
//
// This file is part of s80x86.
//
// s80x86 is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// s80x86 is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with s80x86.  If not, see <http://www.gnu.org/licenses/>.

.at 0xae;
    jmp scasb, ra_sel DI;

.auto_address;
scasb:
    ra_sel DI, a_sel RA, alu_op SELA, mar_wr_sel Q, mar_write, rb_cl,
        jmp_if_not_rep scasb_no_rep;
scasb_rep_loop:
    ra_sel CX, jmp_rb_zero scasb_done;
    ra_sel DI, a_sel RA, b_sel IMMEDIATE, immediate 0x1, alu_op SUB,
        rd_sel_source MICROCODE_RD_SEL, rd_sel CX, segment ES, segment_force;
scasb_no_rep:
    width W8, segment ES, segment_force, mem_read, ra_sel AL,
        a_sel RA, alu_op SELA, tmp_wr_en;
    width W8, a_sel MDR, b_sel TEMP, alu_op SUBREV,
        update_flags OF SF ZF CF PF AF, jmp_if_not_rep scasb_done_no_rep;
    a_sel MAR, b_sel IMMEDIATE, immediate 0x1, alu_op NEXT,
        rd_sel_source MICROCODE_RD_SEL, rd_sel DI, mar_write, mar_wr_sel Q,
        rb_cl, ext_int_yield, jmp_if_rep_not_complete scasb_rep_loop,
        segment ES, segment_force;
scasb_done:
    next_instruction;
scasb_done_no_rep:
    a_sel MAR, b_sel IMMEDIATE, immediate 0x1, alu_op NEXT,
        rd_sel_source MICROCODE_RD_SEL, rd_sel DI, next_instruction;

.at 0xaf;
    jmp scasw, ra_sel DI;

.auto_address;
scasw:
    ra_sel DI, a_sel RA, alu_op SELA, mar_wr_sel Q, mar_write,
        rb_cl, jmp_if_not_rep scasw_no_rep;
scasw_rep_loop:
    ra_sel CX, jmp_rb_zero scasw_done;
    ra_sel DI, a_sel RA, b_sel IMMEDIATE, immediate 0x1, alu_op SUB,
        rd_sel_source MICROCODE_RD_SEL, rd_sel CX, segment ES, segment_force;
scasw_no_rep:
    segment ES, segment_force, mem_read, ra_sel AX, a_sel RA, alu_op SELA,
        tmp_wr_en;
    a_sel MDR, b_sel TEMP, alu_op SUBREV, update_flags OF SF ZF CF PF AF,
        jmp_if_not_rep scasw_done_no_rep;
    a_sel MAR, b_sel IMMEDIATE, immediate 0x2, alu_op NEXT,
        rd_sel_source MICROCODE_RD_SEL, rd_sel DI, mar_write, mar_wr_sel Q,
        rb_cl, ext_int_yield, jmp_if_rep_not_complete scasw_rep_loop,
        segment ES, segment_force;
scasw_done:
    next_instruction;
scasw_done_no_rep:
    a_sel MAR, b_sel IMMEDIATE, immediate 0x2, alu_op NEXT,
        rd_sel_source MICROCODE_RD_SEL, rd_sel DI, next_instruction;

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.