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https://opencores.org/ocsvn/s80186/s80186/trunk
Subversion Repositories s80186
[/] [s80186/] [trunk/] [rtl/] [microcode/] [xchg.us] - Rev 2
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// Copyright Jamie Iles, 2017
//
// This file is part of s80x86.
//
// s80x86 is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// s80x86 is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with s80x86. If not, see <http://www.gnu.org/licenses/>.
.at 0x86;
width WAUTO, modrm_start, mar_write, mar_wr_sel EA,
ra_modrm_rm_reg, jmp_rm_reg_mem xchg86_reg, segment DS;
.at 0x87;
modrm_start, mar_write, mar_wr_sel EA,
ra_modrm_rm_reg, jmp_rm_reg_mem xchg86_reg, segment DS;
.auto_address;
xchg86_reg:
width WAUTO, a_sel RA, alu_op SELA, mar_write, mar_wr_sel Q,
jmp xchg86_reg_store;
xchg86_mem:
segment DS, width WAUTO, mem_read;
width WAUTO, b_sel RB, alu_op SELB, mar_write, mar_wr_sel Q;
// memory value is in MDR, register value is in MAR
width WAUTO, a_sel MDR, alu_op SELA, rd_sel_source MODRM_REG;
width WAUTO, a_sel MAR, alu_op SELA, mdr_write, mar_wr_sel EA,
mar_write, segment DS, jmp write_complete;
xchg86_reg_store:
width WAUTO, b_sel RB, alu_op SELB, rd_sel_source MODRM_RM_REG;
width WAUTO, a_sel MAR, alu_op SELA, rd_sel_source MODRM_REG,
next_instruction;
#define XCHG_REG(opcode, reg) \
.at opcode; \
ra_sel reg, jmp xchg_ ## reg; \
.auto_address; \
xchg_ ## reg: \
a_sel RA, alu_op SELA, mar_write, mar_wr_sel Q, \
ra_sel AX; \
a_sel RA, alu_op SELA, rd_sel_source MICROCODE_RD_SEL, \
rd_sel reg; \
a_sel MAR, alu_op SELA, rd_sel_source MICROCODE_RD_SEL, \
rd_sel AX, next_instruction;
// xchg ax, ax
.at 0x90;
next_instruction;
XCHG_REG(0x91, CX)
XCHG_REG(0x92, DX)
XCHG_REG(0x93, BX)
XCHG_REG(0x94, SP)
XCHG_REG(0x95, BP)
XCHG_REG(0x96, SI)
XCHG_REG(0x97, DI)